參數(shù)資料
型號(hào)： CY8C24794-SPAX
廠(chǎng)商： Cypress Semiconductor Corp.
英文描述： PSoCTM Mixed-Signal Array
中文描述： PSoCTM混合信號(hào)陣列
文件頁(yè)數(shù)： 17/32頁(yè)
文件大?。?/td> 366K
代理商： CY8C24794-SPAX
April 14, 2005
Document No. 38-12018 Rev. *F
17
CY8C24794 Final Data Sheet
3. Electrical Specifications
3.3.5
DC Analog Output Buffer Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40
°
C
≤
T
A
≤
85
°
C, or 3.0V to 3.6V and -40
°
C
≤
T
A
≤
85
°
C, respectively. Typical parameters apply to 5V and 3.3V at 25
°
C and
are for design guidance only.
Table 3-9. 5V DC Analog Output Buffer Specifications
Symbol
V
OSOB
TCV
OSOB
V
CMOB
R
OUTOB
Description
Min
Typ
Max
Units
mV
Notes
Input Offset Voltage (Absolute Value)
–
3
12
Average Input Offset Voltage Drift
–
+6
–
μ
V/°C
V
Common-Mode Input Voltage Range
0.5
–
Vdd - 1.0
Output Resistance
Power = Low
Power = High
High Output Voltage Swing (Load = 32 ohms to Vdd/2)
Power = Low
Power = High
–
–
0.6
0.6
–
–
V
OHIGHOB
0.5 x Vdd
+ 1.1
0.5 x Vdd
+ 1.1
–
–
–
–
V
V
V
OLOWOB
Low Output Voltage Swing (Load = 32 ohms to Vdd/2)
Power = Low
Power = High
–
–
–
–
0.5 x Vdd
- 1.3
0.5 x Vdd
- 1.3
V
V
I
SOB
Supply Current Including Bias Cell (No Load)
Power = Low
Power = High
Supply Voltage Rejection Ratio
–
–
53
1.1
2.6
64
5.1
8.8
–
mA
mA
dB
PSRR
OB
(0.5 x Vdd - 1.3)
≤
V
OUT
≤
(Vdd -
2.3).
Table 3-10. 3.3V DC Analog Output Buffer Specifications
Symbol
V
OSOB
TCV
OSOB
V
CMOB
R
OUTOB
Description
Min
Typ
Max
Units
mV
Notes
Input Offset Voltage (Absolute Value)
–
3
12
Average Input Offset Voltage Drift
–
+6
–
μ
V/°C
Common-Mode Input Voltage Range
0.5
-
Vdd - 1.0
V
Output Resistance
Power = Low
Power = High
High Output Voltage Swing (Load = 1K ohms to Vdd/2)
Power = Low
Power = High
–
–
1
1
–
–
V
OHIGHOB
0.5 x Vdd
+ 1.0
0.5 x Vdd
+ 1.0
–
–
–
–
V
V
V
OLOWOB
Low Output Voltage Swing (Load = 1K ohms to Vdd/2)
Power = Low
Power = High
–
–
–
–
0.5 x Vdd
- 1.0
0.5 x Vdd
- 1.0
V
V
I
SOB
Supply Current Including Bias Cell (No Load)
Power = Low
Power = High
Supply Voltage Rejection Ratio
–
34
0.8
2.0
64
2.0
4.3
–
mA
mA
dB
PSRR
OB
(0.5 x Vdd - 1.0)
≤
V
OUT
≤
(0.5 x
Vdd + 0.9).
相關(guān)PDF資料
PDF描述
CY8C24794-SPE PSoCTM Mixed-Signal Array
CY8C24794-SPI Explosion-Proof Limit Switches Series CX: Short Housing: Top Plunger; 1NC 1NO SPDT Snap Action; Number of internal basic switches BZ: 1; 0.75 in - 14NPT conduit
CY8C24794-SPLFX Environmentally sealed limit switch with Leadwire termination, Rotary Roller Lever actuation, Double Pole Double Throw (DPDT) Circuitry, 5 A (Resistive) ampere rating at 28 Vdc, Military Part Number MS21320-1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY8C24794-SPC 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array
CY8C24794-SPE 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array
CY8C24794-SPI 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array
CY8C24794-SPLFX 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array
CY8C24794-SPPVX 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:PSoCTM Mixed-Signal Array
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