參數(shù)資料
型號: CY8CLED04G01-56LTXI
廠商: Cypress Semiconductor Corp
文件頁數(shù): 5/55頁
文件大?。?/td> 0K
描述: IC MCU 16K FLASH 1K SRAM 56VQFN
特色產(chǎn)品: PowerPSoC? Embedded Power Controller
標準包裝: 260
系列: PowerPSoC® CY8CLED
核心處理器: M8C
芯體尺寸: 8-位
速度: 24MHz
連通性: DALI,DMX512,I²C,IrDA,SPI,UART/USART
外圍設備: LED,LVD,POR,PWM,WDT
輸入/輸出數(shù): 14
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.75 V ~ 5.25 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 56-VFQFN 裸露焊盤
包裝: 托盤
產(chǎn)品目錄頁面: 698 (CN2011-ZH PDF)
配用: 428-2882-ND - KIT STARTER POWERPSOC LIGHTING
428-2281-ND - KIT EVAL POWERPSOC LIGHTING
428-2270-ND - KIT STARTER DEMO LIGHTING
其它名稱: 428-2969
CY8CLED04D01, CY8CLED04D02, CY8CLED04G01
CY8CLED03D01, CY8CLED03D02, CY8CLED03G01
CY8CLED02D01, CY8CLED01D01
Document Number: 001-46319 Rev. *P
Page 13 of 55
6. PSoC Core
The PSoC core is a powerful engine that supports a rich feature
set. The core includes a CPU, memory, clocks, and configurable
general purpose I/O(GPIO).
The M8C CPU core is a powerful processor with speeds up to
24 MHz, providing a four MIPS 8-bit Harvard architecture
microprocessor. The CPU uses an interrupt controller with up to
20 vectors to simplify programming of real time embedded
events. The program execution is timed and protected using the
included sleep and watchdog timers (WDT) time and protect
program execution.
Memory encompasses 16 K of flash for program storage, 1 K of
SRAM for data storage, and up to 2 K of EEPROM emulated
using the flash. Program flash uses four protection levels on
blocks of 64 bytes, allowing customized software IP protection.
The PSoC device incorporates flexible internal clock generators,
including a 24 MHz internal main oscillator (IMO) accurate to
4 percent over temperature and voltage. The 24 MHz IMO can
also be doubled to 48 MHz for use by the digital system. A low
power 32 kHz internal low-speed oscillator (ILO) is provided for
the sleep timer and WDT. The clocks, together with
programmable clock dividers (as a system resource), provide the
flexibility to integrate almost any timing requirement into the
PowerPSoC device.
PowerPSoC GPIOs provide connection to the CPU, digital, and
analog resources of the device. Each pin’s drive mode may be
selected from eight options, allowing great flexibility in external
interfacing. Every pin also has the capability to generate a
system interrupt on high level, low level, and change from last
read.
6.1 Digital System
The digital system contains eight digital PSoC blocks. Each block
is an 8-bit resource that can be used alone or combined with
other blocks to form 8, 16, 24, and 32-bit peripherals, which are
called user module references.
Digital peripheral configurations include:
DMX512
Counters (8 to 32 bit)
Timers (8 to 32 bit)
UART 8-bit with selectable parity
SPI master and slave
I
2C master, slave, and multi-master
Cyclical redundancy checker/generator (8 to 32 bit)
IrDA
Pseudo random sequence generators (8 to 32 bit)
The digital blocks can be connected to any GPIO through a
series of global buses that route any signal to any pin. The buses
also allow signal multiplexing and performing logic operations.
This configurability frees your designs from the constraints of a
fixed peripheral controller.
There are four digital blocks in each row. This allows optimum
choice of system resources for your application.
Figure 6-1. Digital System Block Diagram
6.2 Analog System
The analog system contains six configurable blocks, each
comprised of an opamp circuit allowing the creation of complex
analog signal flows. Analog peripherals are very flexible and can
be customized to support specific application requirements.
Some of the more common PowerPSoC analog functions (most
available as user modules) are:
Analog-to-digital converters (up to 2, with 6 to 12-bit resolution,
selectable as incremental, Delta Sigma, and SAR)
Filters (2 and 4 pole band-pass, low-pass, and notch)
Amplifiers (up to 2, with selectable gain to 48x)
Instrumentation amplifiers (1 with selectable gain to 93x)
Comparators (up to 2, with 16 selectable thresholds)
DACs (up to 2, with 6 to 9-bit resolution)
Multiplying DACs (up to 2, with 6 to 9-bit resolution)
High current output drivers (two with 30 mA drive as a PSoC
core resource)
1.3 V reference (as a system resource)
Modulators
Correlators
Peak detectors
Many other topologies possible
D IG IT A L S YST E M
D ig ita l C lo c k s
F ro m C o re
Dig ita l P S o C Blo c k Ar r a y
To A n a lo g
Sy s te m
8
Row
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pu
t
Co
nf
ig
u
rat
io
n
Row
Out
p
ut
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a
tio
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8
Ro w 0
DBB0 0
DBB0 1
DC B0 2
DC B 0 3
4
G IE [7:0]
G IO [7:0]
G O E [7 :0 ]
GOO[7 :0 ]
G lo bal D igita l
In te rc on nec t
Po rt 1
Po rt 0
Po rt 2
Row
I
nput
Conf
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ut
Conf
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DBB1 0
DB B 1 1
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DC B 1 3
D
4
DB B 0 0
4
To S y s tem B u s
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