參數(shù)資料
型號(hào)： D640G90VI
廠(chǎng)商： Spansion Inc.
英文描述： 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
中文描述： 64兆位（8米× 8位/ 4米x 16位），3.0伏的CMOS只，同步讀/寫(xiě)閃存
文件頁(yè)數(shù)： 29/56頁(yè)
文件大?。?/td> 742K
代理商： D640G90VI
June 6, 2005
Am29DL640G
27
termine the status of the erase operation by reading
DQ7, DQ6, DQ2, or RY/BY# in the erasing bank. Refer
to the Write Operation Status section for information
on these status bits.
Once the sector erase operation has begun, only the
Erase Suspend command is valid. All other com-
mands are ignored. However, note that a
hardware
reset
immediately
terminates the erase operation. If
that occurs, the sector erase command sequence
should be reinitiated once that bank has returned to
reading array data, to ensure data integrity.
Figure 5 illustrates the algorithm for the erase opera-
tion. Refer to the Erase and Program Operations ta-
bles in the AC Characteristics section for parameters,
and Figure 20 section for timing diagrams.
Figure 5.
Erase Operation
Erase Suspend/Erase Resume
Commands
The Erase Suspend command, B0h, allows the sys-
tem to interrupt a sector erase operation and then read
data from, or program data to, any sector not selected
for erasure. The bank address is required when writing
this command. This command is valid only during the
sector erase operation, including the tSEA μs time-out
period during the sector erase command sequence.
The Erase Suspend command is ignored if written dur-
ing the chip erase operation or Embedded Program
algorithm.
When the Erase Suspend command is written during
the sector erase operation, the device requires a max-
imum of tSEL μs to suspend the erase operation.
However, when the Erase Suspend command is writ-
ten during the sector erase time-out, the device imme-
diately terminates the time-out period and suspends
the erase operation. Addresses are “don’t-cares”
when writing the Erase suspend command.
After the erase operation has been suspended, the
bank enters the erase-suspend-read mode. The sys-
tem can read data from or program data to any sector
not selected for erasure. (The device “erase sus-
pends” all sectors selected for erasure.) Reading at
any address within erase-suspended sectors pro-
duces status information on DQ7–DQ0. The system
can use DQ7, or DQ6 and DQ2 together, to determine
if a sector is actively erasing or is erase-suspended.
Refer to the Write Operation Status section for infor-
mation on these status bits.
After an erase-suspended program operation is com-
plete, the bank returns to the erase-suspend-read
mode. The system can determine the status of the
program operation using the DQ7 or DQ6 status bits,
just as in the standard Byte Program operation.
Refer to the Write Operation Status section for more
information.
In the erase-suspend-read mode, the system can also
issue the autoselect command sequence. The device
allows reading autoselect codes even at addresses
within erasing sectors, since the codes are not stored
in the memory array. When the device exits the au-
toselect mode, the device reverts to the Erase Sus-
pend mode, and is ready for another valid operation.
Refer to the Autoselect Mode and Autoselect Com-
mand Sequence sections for details.
To resume the sector erase operation, the system
must write the Erase Resume command (address bits
are don’t care). The bank address of the erase-sus-
pended bank is required when writing this command.
Further writes of the Resume command are ignored.
Another Erase Suspend command can be written after
the chip has resumed erasing.
START
Write Erase
Command Sequence
(Notes 1, 2)
Data Poll to Erasing
Bank from System
Data = FFh
No
Yes
Erasure Completed
Embedded
Erase
algorithm
in progress
Notes:
1. See Table 12 for erase command sequence.
2. See the section on DQ3 for information on the sector
erase timer.
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