參數(shù)資料
型號： DAC5674EVM
廠商： Texas Instruments
文件頁數(shù)： 15/39頁
文件大小： 0K
描述： EVAL MODULE FOR DAC5674
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標(biāo)準(zhǔn)包裝： 1
系列： CommsDAC™
DAC 的數(shù)量： 1
位數(shù)： 14
采樣率（每秒）： 400M
數(shù)據(jù)接口： 并聯(lián)
設(shè)置時(shí)間： 20ns
DAC 型： 電流
工作溫度： -40°C ~ 85°C
已供物品： 板
已用 IC / 零件： DAC5674
相關(guān)產(chǎn)品： DAC5674IPHPRG4-ND - IC DAC 14BIT 400MSPS 48-HTQFP
DAC5674IPHPR-ND - IC DAC 14BIT 400MSPS 48-HTQFP
DAC5674IPHPG4-ND - IC DAC 14BIT 400MSPS 48-HTQFP
296-15726-ND - IC DAC 14BIT 400MSPS 48-HTQFP
其它名稱： 296-30860
DAC5674EVM-ND
DAC5674
SLWS148A SEPTEMBER 2003 REVISED OCTOBER 2005
www.ti.com
22
Output Frequency / DAC Frequency
0.000
0.125
0.250
0.375
0.500
0.000
0.125
0.250
0.375
0.500
Spur
Frequency
/
DAC
Frequency
IF 3fDAC/4
IF fDAC/4
IF + fDAC/4
IF fDAC/2
Output IF
Figure 23. Location of Clock Mixing Spurs vs IF for 4
y Mode
The offset between wanted and spurious signals is maximized at low IFs (< fDAC/8) and at fDAC × 3/16,
fDAC
× 5/16, and fDAC × 7/16. For example, with fDATA = 100 MSPS and 4× interpolation, operating with
IF = fDAC × 5/16 = 125 MHz results in spurious signals at offsets of ±50 MHz from the wanted signal.
Figure 24a shows the amplitude of each spurious signal as a function of IF in external-clock mode. The
dominant spurious signal is IF fDAC/2. The amplitudes of the IF + fDAC/4 and IF fDAC/4 are the next-highest
spurious signals and are approximately at the same amplitude. Finally, at IF frequencies greater than 100 MHz,
small spurious signals at IF fDAC × 3/4 are measurable.
Figure 24b shows the amplitude of each spurious signal as a function of IF in PLL clock mode. Generating the
DAC clock with the onboard PLL/VCO increases the IF fDAC/2 by 3 dB. The amplitude of the IF ± fDAC/4 and
IF fDAC × 3/4 remain at about the same level as in the external-clock mode.
a. External Clock Mode
b. PLL Mode
70
60
50
40
30
20
10
0
50
100
150
200
fsig Output Frequency MHz
Amplitude
of
Spurs
dBc
IF FDAC/2
IF + FDAC/4
IF 3FDAC/4
IF FDAC/4
70
60
50
40
30
20
10
0
50
100
150
200
fsig Output Frequency MHz
Amplitude
of
Spurs
dBc
IF FDAC/2
IF + FDAC/4
IF 3FDAC/4
IF FDAC/4
Figure 24. External Clock Mode and PLL Mode
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DAC5674IPHP 功能描述:數(shù)模轉(zhuǎn)換器- DAC 14-Bit 400 CommsDAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC5674IPHPG4 功能描述:數(shù)模轉(zhuǎn)換器- DAC 14-Bit 400 CommsDAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC5674IPHP-ND 制造商: 功能描述: 制造商:undefined 功能描述:
DAC5674IPHPR 功能描述:數(shù)模轉(zhuǎn)換器- DAC 14-Bit 400 CommsDAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC5674IPHPRG4 功能描述:數(shù)模轉(zhuǎn)換器- DAC 14-Bit 400 CommsDAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
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