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參數(shù)資料
| 型號： | DAC7552IRGT |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 12-BIT, DUAL, ULTRALOW GLITCH, VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 12位雙，超低毛刺，電壓輸出數(shù)字模擬轉(zhuǎn)換器 |
| 文件頁數(shù)： | 15/22頁 |
| 文件大?。?/td> | 862K |
| 代理商： | DAC7552IRGT |
www.ti.com
THEORY OF OPERATION
D/A SECTION
The architecture of the DAC7552 consists of a string
DAC followed by an output buffer amplifier.
Figure 29
shows a generalized block diagram of the DAC
architecture.
OUTPUT BUFFER AMPLIFIERS
The
output
amplifier
rail-to-rail voltages on its output, which gives an
output range of 0 V to V
DD
. It is capable of driving a
load of 2 k
in parallel with up to 1000 pF to GND.
The source and sink capabilities of the output ampli-
fier can be seen in the typical curves. The slew rate is
1.8 V/μs with a typical settling time of 3 μs with the
output unloaded.
DAC External Reference Input
_
+
Resistor String
Ref
Ref +
DAC Register
V
OUT
V
REF
GND
V
FB
100 k
100 k
50 k
Amplifier Sense Input
V
REF
To Output
Amplifier
R
R
R
R
GND
RESISTOR STRING
The resistor string section is shown in
Figure 30
. It is
simply a string of resistors, each of value R. The
digital code loaded to the DAC register determines at
which node on the string the voltage is tapped off to
be fed into the output amplifier. The voltage is tapped
off by closing one of the switches connecting the
string to the amplifier. Because it is a string of
resistors, it is specified monotonic. The DAC7552
architecture uses two separate resistor strings to
minimize channel-to-channel crosstalk.
Power-On Reset
DAC7552
SLAS442B–JANUARY 2005–REVISED JUNE 2005
is
capable
of
generating
Two separate reference pins are provided for two
DACs, providing maximum flexibility. VREFA serves
DAC A and VREFB serves DAC B. VREFA and
VREFB can be externally shorted together for sim-
plicity.
Figure 29. Typical DAC Architecture
The input coding to the DAC7552 is unsigned binary,
which gives the ideal output voltage as:
V
OUT
= VREF × D/4096
Where D = decimal equivalent of the binary code that
is loaded to the DAC register which can range from 0
to 4095.
It is recommended to use a buffered reference in the
external circuit (e.g., REF3140). The input impedance
is typically 100 k
for each reference input pin.
The DAC7552 contains two amplifier feedback input
pins, VFBA and VFBB. For voltage output operation,
VFBA and VFBB must externally connect to VOUTA
and VOUTB, respectively. For better DC accuracy,
these connections should be made at load points.
The VFBA and VFBB pins are also useful for a
variety of applications, including digitally controlled
current sources. Each feedback input pin is internally
connected to the DAC amplifier's negative input
terminal through a 100-k
resistor; and, the ampli-
fier's negative input terminal internally connects to
ground through another 100-k
resistor (See
Fig-
ure 29
). This forms a gain-of-two, noninverting ampli-
fier configuration. Overall gain remains one because
the resistor string has a divide-by-two configuration.
The resistance seen at each VFBx pin is approxi-
mately 200 k
to ground.
Figure 30. Typical Resistor String
On power up, all internal registers are cleared and all
channels are updated with zero-scale voltages. Until
valid data is written, all DAC outputs remain in this
state. This is particularly useful in applications where
it is important to know the state of the DAC outputs
while the device is powering up. In order not to turn
on ESD protection devices, V
should be applied
before any other pin is brought high.
15
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