參數(shù)資料
型號(hào)： DAC7571EVM
廠商： Texas Instruments, Inc.
英文描述： DAC7571 Evaluation Module(DAC7571評(píng)估模塊)
中文描述： DAC7571評(píng)估模塊（DAC7571評(píng)估模塊）
文件頁數(shù)： 30/39頁
文件大?。?/td> 437K
代理商： DAC7571EVM
Factory Default Setting
3-2
3.1
Factory Default Setting
The EVM board is factory-configured to operate in unipolar 5-V output mode.
Table 3-1.DAC7574/DAC6574/DAC5574 EVM Factory Default Jumper Setting
DAC7574/DAC6574/DAC5574 EVM CONFIGURATION
Jumper
Position
2-3
Power supply for U1 is 5 VA.
1-2
DAC output A (V
OUT
A) is routed to J4-2.
OPEN
U2 is configured as unity gain op-amp.
2-3
SDA is routed to SDATA.
1-2
Negative supply rail of U2 op-amp is supplied with V
SS.
2-3
SCL is routed to SCLK.
OPEN
Address line, A1, is pulled high.
OPEN
Address line, A0, is pulled high.
OPEN
For I
2
C SDA bit-bang using the DSP
OPEN
For U4 use only
1-2
DAC output B (V
OUT
B) is routed to J4-4.
1-2
DAC output C (V
OUT
C) is routed to J4-6.
1-2
DAC output D (V
OUT
D) is routed to J4-8.
2-3
The 5 VD is routed for digital supply.
OPEN
For U4 external V
REF
use only
OPEN
For U4 use when tying V
DD
and V
REF
together
Reference
W1
W2
W3
W4
W5
W6
W7
W8
W9
W10
W11
W12
W13
W14
TP8
TP9
Function
Table 3-2.DAC7571/DAC6571/DAC5571 EVM Factory Default Jumper Setting
DAC7571/DAC6571/DAC5571 EVM CONFIGURATION
Reference
Jumper
Position
2-3
Function
W1
Power supply for U8 is 5 VA.
W2
1-2
DAC output is routed to J4-2.
W3
OPEN
U2 is configured as unity gain op-amp.
W4
2-3
SDA is routed to SDATA.
W5
1-2
Negative supply rail of U2 op-amp is supplied with V
SS.
SCL is routed to SCLK.
W6
2-3
W7
OPEN
For U1 use only
W8
OPEN
For U1 use only
For I
2
C SDA bit-bang using the DSP
W9
OPEN
W10
OPEN
For U4 use only
W11
1-2
For U1 use only
W12
1-2
For U! use only
W13
1-2
For U1 use only
W14
2-3
The 5 VD is routed for digital supply.
TP8
OPEN
For U4 external V
REF
use only
For U4 use when tying V
DD
and V
REF
together
TP9
OPEN
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