參數(shù)資料
型號： DAC7741Y
英文描述： 16-Bit, Single Channel DIGITAL-TO-ANALOG CONVERTER With Internal Reference and Parallel Interface
中文描述： 16位，單通道數(shù)字到模擬轉(zhuǎn)換器，具有內(nèi)部參考和并行接口
文件頁數(shù)： 16/20頁
文件大?。?/td> 421K
代理商： DAC7741Y
DAC7741
SBAS248A
16
www.ti.com
FIGURE 8. Offset Adjustment Transfer Characteristic.
OFFSET ADJUSTMENT
Offset adjustment is accomplished by introducing a small
current into the summing junction (SJ) of the DAC7741. The
voltage at SJ, or V
SJ
, is dependent on the output configura-
tion of the DAC7741. See Table IV for the required pin
strapping for a given configuration and the nominal values of
V
SJ
for each output range.
REFERENCE
CONFIGURATION
CONFIGURATION R
OFFSET
Internal
0V to +10V
Reference
–
10V to +10V
–
5V to +5V
OUTPUT
PIN STRAPPING
RFB1
V
SJ(1)
RFB2
to V
REF
NC
to AGND to V
OUT
to V
OUT
+1.666V
to V
REF
to V
OUT
to V
OUT
NC
NC
to AGND to V
OUT
to V
OUT
to V
OUT
to V
OUT
NC
+5V
to V
OUT
+3.333V
External
Reference
0V to V
REF
–
V
REF
to V
REF
–
V
REF
/2 to V
REF
/2
V
REF
/2
V
REF
/3
V
REF
/6
to V
OUT
NOTE: (1) Voltage measured at V
SJ
for a given configuration.
TABLE IV. Nominal V
SJ
vs. V
OUT
and Reference Configuration.
OUTPUT
CONFIGURATION
R
POT2
R
1
R
S
I
SJ
NOMINAL
OFFSET
ADJUSTMENT
±
25mV
±
55mV
±
21mV
RANGE
0V to +10V
–
10V to +10V
–
5V to +5V
10K
10K
10K
0
2.5M
1.5M
1M
±
2
μ
A
±
2.2
μ
A
±
1.7
μ
A
5K
20K
TABLE V. Recommended External Component Values for
Symmetrical Offset Adjustment (V
REF
= 10V).
The current level required to adjust the DAC7741 offset can
be created by using a potentiometer divider as shown in
Figure 7. Another alternative is to use a unipolar DAC in
order to apply a voltage, V
OADJ
, to the resistor R
S
. A
±
2uA
current range applied to SJ will ensure offset adjustment
coverage of the
±
0.1% maximum offset specification of the
DAC7741.
When in a unipolar configuration (V
SJ
= 5V), only a single
resistor, R
S
, is needed for symmetrical offset adjustment with
a 0V to 10V V
OADJ
range. When in one of the two bipolar
configurations, V
SJ
is either +3.333v (
±
10V range) or +1.666V
(
±
5V range), and circuit values chosen to match those given
in Table V will provide symmetrical offset adjust. Please refer
to Figure 7 for component configuration.
OFFSET ADJUST RANGE
–
10V to +10V V
OUT
Configuration
min (75% of typ)
min (75% of typ)
typ
typ
50
25
0
–
25
–
50
O
O
–
2
2
0
–
1
1
I
SJ
(
μ
A)
0V to 10V and
–
5V to +5V
V
OUT
Configuration
Figure 8 illustrates the typical and minimum offset adjustment
ranges provided by forcing a current at SJ for a given output
voltage configuration.
GAIN ADJUSTMENT
When using the internal reference of the DAC7741, gain
adjustment is performed by adjusting the internal refer-
ence voltage via the reference adjust pin, REFADJ. The
effect of a reference voltage change on the gain of the
DAC output can be seen in the generic equation (for
unipolar configuration):
V
OUT
= V
REFIN
(N/65536)
where N is represented in decimal format and ranges from 0
to 65535.
REFADJ can be driven by a low impedance voltage source
such as a unipolar, 0V to +10V DAC or a potentiometer (less
than 100k
) as shown in Figure 7. Since the input imped-
ance of REFADJ is typically 50k
, the smaller the resistance
of the potentiometer, the more linear the adjustment will be.
A 10k
potentiometer is suggested if linearity of the refer-
ence adjustment is of concern.
REF
OUT
ADJUST RANGE
40
30
20
10
0
–
10
–
20
–
30
–
40
R
O
0
2
4
6
8
10
REFADJ (V)
Typical REF
Adjustment Range
Minimum REF
Adjustment Range
FIGURE 9. Internal Reference Adjustment Transfer Charac-
teristic.
VOLTAGE AT REFADJ
REFADJ = 0V
REFADJ = 5V or NC
(1)
REFADJ = 10V
REF
OUT
VOLTAGE
10V + 25mV (min)
10V
10V
–
25mV (max)
NOTE: "NC" is "Not Connected"
TABLE VI. Minimum Internal Reference Adjustment Range.
When the DAC7741 internal reference is not used, gain
adjustments can be made via trimming the external refer-
ence applied to the DAC at REF
IN
. This can be accomplished
through using a potentiometer, unipolar DAC, or other means
of precision voltage adjustment to control the voltage pre-
sented to the DAC7741 by the external reference. Figure 9
and Table VI summarize the range of adjustment of the
internal reference via REFADJ.
相關(guān)PDF資料
PDF描述
DAC7744 16-Bit, Quad Voltage Output DIGITAL-TO-ANALOG CONVERTER
DAC7744E Single Supply RS232C Line Driver/Receiver(?????μ?o?RS232C ?o?????????¨???2???2??????)
DAC7744EB Single Supply RS232C Line Driver/Receiver(?????μ?o?RS232C ?o?????????¨???2???2??????)
DAC7744EC Single Supply RS232C Line Driver/Receiver(?????μ?o?RS232C ?o?????????¨???2???2??????)
DAC7802K Dual Monolithic CMOS 12-Bit Multiplying DIGITAL-TO-ANALOG CONVERTERS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DAC7741Y/250 功能描述:數(shù)模轉(zhuǎn)換器- DAC 16-Bit Sng Ch W/Int +10V Ref & Para I/F RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC7741Y/250G4 功能描述:數(shù)模轉(zhuǎn)換器- DAC 16B,Sgl Channel,DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC7741Y/2K 功能描述:數(shù)模轉(zhuǎn)換器- DAC 16-Bit Sng Ch W/Int +10V Ref & Para I/F RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC7741Y/2KG4 功能描述:數(shù)模轉(zhuǎn)換器- DAC 16B,Sgl Channel,DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC7741YB 制造商:BB 制造商全稱:BB 功能描述:16-Bit, Single Channel DIGITAL-TO-ANALOG CONVERTER With Internal Reference and Parallel Interface
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*