參數(shù)資料
型號(hào): DAC7801LU
廠商: Texas Instruments
文件頁(yè)數(shù): 18/23頁(yè)
文件大?。?/td> 0K
描述: IC DAC 12BIT DUAL MULT 24-SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Basics
標(biāo)準(zhǔn)包裝: 25
設(shè)置時(shí)間: 400ns
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
產(chǎn)品目錄頁(yè)面: 900 (CN2011-ZH PDF)
其它名稱: 296-18289-5
DAC7801LU-ND
DAC7800, 7801, 7802
4
SBAS005A
www.ti.com
DATA
CS
CLK
t
1
t
5
UPD A
UPD B
t
3
t
7
CLR
t
6
t
8
t
4
0V
5V
0V
NOTES: (1) All input signal rise and fall times are measured from 10% to 90% of +5V. t = t = 5ns.
(2) Timing measurement reference level is V + V
2
F
R
IH
IL
.
t
2
PARAMETER
MINIMUM
t1 — Data Setup Time
15ns
t2 — Data Hold Time
15ns
t3 — Chip Select to CLK,
15ns
Update, Data Setup Time
t4 — Chip Select to CLK,
40ns
Update, Data Hold Time
t5 — CLK Pulse Width
40ns
t6 — Clear Pulse Width
40ns
t7 — Update Pulse Width
40ns
t8 — CLK Edge to UPD A
15ns
or UPD B
TIMING CHARACTERISTICS
VDD = +5V, VREF A = VREF B = +10V, TA = –40°C to +85°C.
Data In
Bit 0
Bit 23
Bit 22
Bit 21
Bit 20
Bit 19
Bit 18
Bit 17
Bit 16
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
LSB
DAC A
MSB
DAC A
LSB
DAC B
MSB
DAC B
DAC7800 Data Input Sequence
DAC7800 Digital Interface Block Diagram
24-Bit
Shift Register
DAC A Register
UPD A
Data In
CLK
UPD B
LSB
MSB
DAC B Register
LSB
MSB
Bit
23
Bit
12
Bit
11
Bit
0
CLK
DATA INPUT FORMAT
DAC7800 (Cont.)
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