參數資料
型號: DAC7821IRGPR
廠商: Texas Instruments, Inc.
英文描述: 50/MDR/WMNT/PLASTIC PLUG/20MIN
中文描述: 12位,并行輸入,乘法數字到模擬轉換器
文件頁數: 4/18頁
文件大?。?/td> 1597K
代理商: DAC7821IRGPR
www.ti.com
DATAVALID
DATAVALID
R/
W
CS
DATA
t
1
t
2
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
TIMING REQUIREMENTS: 2.5 V to 4.5 V
At t
r
= t
f
= 1 ns (10% to 90% of V
DD
) and timed from a voltage level of (V
IL
+ V
IH
)/2; V
DD
= +2.5 V to +4.5 V, V
REF
= +10 V,
I
OUT
2 = 0 V. All specifications –40
°
C to +125
°
C, unless otherwise noted.
TIMING REQUIREMENTS: 4.5 V to 5.5 V
At t
r
= t
= 1 ns (10% to 90% of V
DD
) and timed from a voltage level of (V
IL
+ V
IH
)/2; V
DD
= +4.5 V to +5.5 V, V
REF
= +10 V,
I
OUT
2 = 0 V. All specifications –40
°
C to +125
°
C, unless otherwise noted.
DAC7821
SBAS365A–OCTOBER 2005–REVISED FEBRUARY 2006
TIMING INFORMATION
DAC7821
PARAMETER
(1)
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
R/W to CS setup time
R/W to CS hold time
CS low time (write cycle)
Data setup time
Data hold time
R/W high to CS low
CS min high time
Data access time
Bus relinquish time
0
0
10
6
0
5
9
20
5
40
10
(1)
Ensured by design; not production tested.
DAC7821
PARAMETER
(1)
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
R/W to CS setup time
R/W to CS hold time
CS low time (write cycle)
Data setup time
Data hold time
R/W high to CS low
CS min high time
Data access time
Bus relinquish time
0
0
10
6
0
5
7
10
5
20
10
(1)
Ensured by design; not production tested.
4
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