3
DAC80/80P
FUNCTIONAL DIAGRAM AND PIN ASSIGNMENTS
ABSOLUTE MAXIMUM RATINGS
PACKAGE INFORMATION
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
PACKAGE DRAWING
NUMBER
(1)
MODEL
PACKAGE
DAC80P
DAC80
24-Pin Plastic DIP
24-Pin Ceramic DIP
167
125
+V
CC
to Common ...................................................................... 0V to +18V
–V
CC
to Common ......................................................................... 0V to –18
Digital Data Inputs to Common .............................................. –1V to +18V
Reference Output to Common ............................................................
±
V
CC
Reference Input to Common ...............................................................
±
V
CC
Bipolar Offset to Common...................................................................
±
V
CC
10V Range R to Common ...................................................................
±
V
CC
20V Range R to Common ...................................................................
±
V
CC
External Voltage to DAC Output .............................................. –5V to +5V
Lead Temperature (soldering, 10s)................................................ +300
°
C
Max Junction Temperature .............................................................. 165
°
C
Thermal Resistance,
θ
JA
: Plastic DIP ...........................................100
°
C/W
Ceramic DIP .........................................65
°
C/W
Stresses above those listed under “Absolute Maximum Ratings” may
cause permanent damage to the device. Exposure to absolute maxi-
mum conditions for extended periods may affect device reliability.
NOTE: (1) Logic supply applied to this pin has no effect.
(MSB) Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
(LSB) Bit 12
6.3V Ref Out
Gain Adjust
+V
CC
Common
Summing Junction
20V Range
10V Range
Bipolar Offset
Ref Input
V
OUT
–V
CC
NC
(1)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Reference
Control
Circuit
12-Bit
Resistor
Ladder
Network
and
Current
Switches
(MSB) Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
(LSB) Bit 12
6.3V Ref Out
Gain Adjust
+V
CC
Common
Scaling Network
Scaling Network
Scaling Network
Bipolar Offset
Ref Input
I
OUT
–V
CC
NC
(1)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Reference
Control
Circuit
12-Bit
Resistor
Ladder
Network
and
Current
Switches
Voltage Models
Current Models
5k
5k
6.3k
2k
3k
6.3k
5k
BURN-IN SCREENING
Burn-in screening is an option available for the models
indicated in the Ordering Information table. Burn-in dura-
tion is 160 hours at the maximum specified grade operating
temperature (or equivalent combination of time and tem-
perature).
All units are tested after burn-in to ensure that grade speci-
fications are met. To order burn-in, add “–BI” to the base
model number.
ORDERING INFORMATION
MODEL
PACKAGE
OUTPUT
DAC80-CBI-I
DAC80Z-CBI-I
DAC80-CBI-V
DAC80Z-CBI-V
DAC80P-CBI-V
Ceramic DIP
Ceramic DIP
Ceramic DIP
Ceramic DIP
Plastic DIP
Current
Current
Voltage
Voltage
Voltage
BURN-IN SCREENING OPTION
BURN-IN TEMP.
(160h)
(1)
+125
°
C
+125
°
C
MODEL
PACKAGE
DAC80-CBI-V-BI
DAC80P-CBI-V-BI
Ceramic DIP
Plastic DIP
NOTE: (1) Or equivalent combination. See text.