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參數(shù)資料
| 型號： | DAC8043AFS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 12-Bit Serial Input Multiplying D/A Converter |
| 中文描述： | SERIAL INPUT LOADING, 1 us SETTLING TIME, 12-BIT DAC, PDSO8 |
| 封裝： | 1.75 MM HEIGHT, LOW PROFILE, SOIC-8 |
| 文件頁數(shù)： | 8/8頁 |
| 文件大?。?/td> | 137K |
| 代理商： | DAC8043AFS |
REV. 0
DAC8043A
–8–
C
P
UNIPOLAR 2-QUADRANT MULTIPLYING
The most straightforward application of the DAC8043A is in
the 2-quadrant multiplying configuration shown in Figure 19. If
the reference input signal is replaced with a fixed dc voltage
reference, the DAC output will provide a proportional dc volt-
age output according to the transfer equation:
V
OUT
= –
D
/4096
×
V
REF
where
D
is the decimal data loaded into the DAC register and
V
REF
is the externally applied reference voltage source.
V
REF
I
OUT
GND
OP77
2R
R
R
FB
V
AC
V
DD
R
FB
6
10V
P
V
OUT
2R
DIGITAL INPUTS OMITTED FOR CLARITY
10pF
Figure 19. Unipolar (2-Quadrant) Operation
BIPOLAR 4-QUADRANT MULTIPLYING
Figure 20 shows a suggested circuit to achieve 4-quadrant mul-
tiplying operation. The summing amplifier multiplies V
OUT1
by
2, and offsets the output with the reference voltage so that a
midscale digital input code of 2048 places V
OUT2
at zero volts.
The negative full-scale voltage will be V
REF
when the DAC is
loaded with all zeros. The positive full-scale output will be
–(V
REF
– 1 LSB) when the DAC is loaded with all ones. Thus
the digital coding is offset binary. The voltage output transfer
equation for various input data and reference (or signal) values
follows:
V
OUT
2
= (
D
/2048 – 1)
×
–
V
REF
where
D
is the decimal data loaded into the DAC register and
V
REF
is the externally applied reference voltage source.
Precision resistors will be necessary to avoid ratio errors. Other-
wise trimming will be required to achieve full accuracy specifica-
tions available from the DAC8043A device. See the various
Analog Devices Digital Potentiometer products for automated
trimming solutions (e.g., the AD5204 for low voltage applica-
tions or the AD7376 for high voltage applications).
(0V TO –V
REF
)
V
REF
I
OUT
GND
2R
R
R
FB
V
AC
V
DD
R
FB
6
10V
P
V
OUT1
2R
DIGITAL INPUTS OMITTED FOR CLARITY
OP213
10k
V
OP213
V
OUT2
20k
V
20k
V
10pF
Figure 20. Bipolar (4-Quadrant) Operation
8-Lead SOIC (SO-8)
0.1968 (5.00)
0.1890 (4.80)
8
5
4
1
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.0688 (1.75)
0.0532 (1.35)
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0500
(1.27)
BSC
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8°
0°
0.0196 (0.50)
8-Lead Plastic DIP (N-8)
8
1
4
5
0.430 (10.92)
0.348 (8.84)
0.280 (7.11)
0.240 (6.10)
PIN 1
SEATING
PLANE
0.022 (0.558)
0.014 (0.356)
0.060 (1.52)
0.015 (0.38)
0.210 (5.33)
MAX
0.130
(3.30)
MIN
0.070 (1.77)
0.045 (1.15)
0.100
(2.54)
BSC
0.160 (4.06)
0.115 (2.93)
0.325 (8.25)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
0.195 (4.95)
0.115 (2.93)
8-Lead TSSOP (RU-8)
8
5
4
1
0.122 (3.10)
0.114 (2.90)
0
0
0
0
PIN 1
0.0256 (0.65)
BSC
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.0118 (0.30)
0.0075 (0.19)
0.0433
(1.10)
MAX
0.0079 (0.20)
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
8
8
0
8
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
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