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參數(shù)資料
| 型號： | DAC8043EZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 12-Bit Serial Input Multiplying CMOS D/A Converter |
| 中文描述： | SERIAL INPUT LOADING, 0.25 us SETTLING TIME, 12-BIT DAC, CDIP8 |
| 封裝： | CERDIP-8 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 189K |
| 代理商： | DAC8043EZ |
DAC8043
–6–
REV. C
Figure 1. Digital Input Protection
T he digital circuitry forms an interface in which serial data can
be loaded under microprocessor control into a 12-bit shift regis-
ter and then transferred, in parallel, to the 12-bit DAC register.
A simplified circuit of the DAC8043 is shown in Figure 2. An
inverted R-2R ladder network consisting of silicon-chrome,
highly-stable (+50 ppm/
°
C) thin-film resistors, and twelve pairs
of NMOS current-steering switches.
T hese switches steer binarily weighted currents into either I
OUT
or GND; this yields a constant current in each ladder leg, regard-
less of digital input code. T his constant current results in a con-
stant input resistance at V
REF
equal to R. T he V
REF
input may
be driven by any reference voltage or current, ac or dc that is
within the limits stated in the Absolute Maximum Ratings.
T he twelve output current-steering NMOS FET switches are in
series with each R-2R resistor, they can introduce bit errors if all
are of the same R
ON
resistance value. T hey were designed such
that the switch “ON” resistance be binarily scaled so that the
voltage drop across each switch remains constant. If, for ex-
ample, switch 1 of Figure 2 was designed with an “ON” resis-
tance of 10
, switch 2 for 20
, etc., a constant 5 mV drop will
then be maintained across each switch.
Write Cycle Timing Diagram
PARAME T E R DE FINIT IONS
INT E GRAL NONLINE ARIT Y (INL)
T his is the single most important DAC specification. ADI mea-
sures INL as the maximum deviation of the analog output (from
the ideal) from a straight line drawn between the end points. It
is expressed as a percent of full-scale range or in terms of LSBs.
Refer to PMI 1988 Data Book section 11 for additional digital-
to-analog converter definitions.
INT E RFACE LOGIC INFORMAT ION
T he DAC8043 has been designed for ease of operation. T he
timing diagram illustrates the input register loading sequence.
Note that the most significant bit (MSB) is loaded first.
Once the input register is full, the data is transferred to the
DAC register by taking
LD
momentarily low.
DIGIT AL SE CT ION
T he DAC8043’s digital inputs, SRI,
LD
, and CLK , are T T L
compatible. T he input voltage levels affect the amount of cur-
rent drawn from the supply; peak supply current occurs as the
digital input (V
IN
) passes through the transition region. See the
Supply Current vs. Logic Input Voltage graph located under the
typical performance characteristics curves. Maintaining the digi-
tal input voltage levels as close as possible to the supplies, V
DD
and GND, minimizes supply current consumption.
T he DAC8043’s digital inputs have been designed with ESD re-
sistance incorporated through careful layout and the inclusion of
input protection circuitry. Figure 1 shows the input protection
diodes and series resistor; this input structure is duplicated on
each digital input. High voltage static charges applied to the in-
puts are shunted to the supply and ground rails through forward
biased diodes. T hese protection diodes were designed to clamp
the inputs to well below dangerous levels during static discharge
conditions.
GE NE RAL CIRCUIT INFORMAT ION
T he DAC8043 is a 12-bit multiplying D/A converter with a very
low temperature coefficient. It contains an R-2R resistor ladder
network, data input and control logic, and two data registers.
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| DAC8043FP | 功能描述:IC DAC 12BIT MULTIPLY CMOS 8-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設(shè)置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| DAC8043FPZ | 功能描述:IC DAC 12BIT MULTIPLY CMOS 8-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| DAC8043FS | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit Serial Input Multiplying CMOS D/A Converter |
| DAC8043FSZ | 功能描述:IC DAC 12BIT MULT SRL INP 8SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設(shè)置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| DAC8043FZ | 制造商:Rochester Electronics LLC 功能描述:27PIN SERIAL INPUT 12-BIT - Bulk |
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