參數(shù)資料
型號(hào): DAC8043GP
廠商: PRECISION MONOLITHICS INC
元件分類: DAC
英文描述: 6mm DC,STRT,S-ON,SOCKT ASYM
中文描述: 12-BIT DAC, PDIP8
文件頁數(shù): 10/12頁
文件大?。?/td> 189K
代理商: DAC8043GP
DAC8043
–10–
REV. C
Figure 8. Analog/Digital Divider
INT E RFACING T O T HE MC6800
As shown in Figure 9, the DAC8043 may be interfaced to the
6800 by successively executing memory WRIT E instructions
while manipulating the data between WRIT Es, so that each
WRIT E presents the next bit.
In this example the most significant bits are found in memory
location 0000 and 0001. T he four MSBs are found in the lower
half of 0000, the eight LSBs in 0001. T he data is taken from the
DB
7
line.
T he serial data loading is triggered by the CLK pulse which is
asserted by a decoded memory WRIT E to memory location
2000, R/
W
, and
φ
2. A WRIT E to address 4000 transfers data
from input register to DAC register.
Figure 9. DAC8043–MC6800 Interface
DAC8043 INT E RFACE T O T HE 8085
T he DAC8043’s interface to the 8085 microprocessor is shown
in Figure 10. Note that the microprocessor’s SOD line is used
to present data serially to the DAC.
Data is clocked into the DAC8043 by executing memory write
instructions. T he clock input is generated by decoding address
8000 and WR. Data is loaded into the DAC register with a
memory write instruction to address A000.
Serial data supplied to the DAC8043 must be present in the
right justified format in registers H and L of the microprocessor.
Figure 10. DAC8043-8085 Interface
DAC8043 T O 68000 INT E RFACING
T he DAC8043 interfacing to the 68000 microprocessor is
shown in Figure 11. Again, serial data to the DAC is taken from
one of the microprocessor’s data bus lines.
Figure 11. DAC8043–68000
μ
P Interface
相關(guān)PDF資料
PDF描述
DAC8043HP 12-Bit Serial Input Multiplying CMOS D/A Converter
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