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參數(shù)資料
| 型號： | DAC8501E250 |
| 英文描述： | Low-Power, Rail-to-Rail Output, 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 低功耗，軌至軌輸出，16位串行輸入數(shù)字至模擬轉(zhuǎn)換器 |
| 文件頁數(shù)： | 14/18頁 |
| 文件大?。?/td> | 321K |
| 代理商： | DAC8501E250 |
DAC8501
SBAS212A
14
www.ti.com
(2)
DAC8501 TO 68HC11 INTERFACE
Figure 8 shows a serial interface between the DAC8501 and
the 68HC11 microcontroller. SCK of the 68HC11 drives the
SCLK of the DAC8501, whereas the MOSI output drives the
serial data line of the DAC. The
SYNC
signal is derived from
a port line (PC7), similar to what was done for the 8051.
are at some value other than 5V. The REF02 will output a
steady supply voltage for the DAC8501; if the REF02 is used,
the typical current it needs to supply to the DAC8501 is
285
μ
A. This is with no load on the output of the DAC. When
the DAC output is loaded, the REF02 also needs to supply
the current to the load. The total current required (with a 5k
load on the DAC output) is:
285
μ
A + (5V/5k
) = 1.29mA
The load regulation of the REF02 is typically 0.005%/mA,
which results in an error of 322
μ
V for the 1.29mA current
drawn from it. This corresponds to a 4.2LSB error.
BIPOLAR OPERATION USING THE DAC8501
The DAC8501 has been designed for single-supply operation
but a bipolar output range is also possible using the circuit in
Figure 10. The circuit shown will give an output voltage range
of
±
V
REF
. Rail-to-rail operation at the amplifier output is
achievable using an OPA703 as the output amplifier.
FIGURE 9. REF02 as a Power Supply to the DAC8501.
FIGURE 10. Bipolar Operation with the DAC8501.
FIGURE 8. DAC8501 to 68HC11 Interface.
68HC11
(1)
PC7
SCK
MOSI
SYNC
SCLK
D
IN
DAC8501
(1)
NOTE: (1) Additional pins omitted for clarity.
REF02
DAC8501
3-Wire
Serial
Interface
+5V
285
μ
A (I
DD
+ I
REF
)
V
REF
V
DD
V
OUT
= 0V to 5V
SYNC
SCLK
D
IN
+15
DAC8501
V
REF
V
OUT
V
FB
R
1
10k
R
2
10k
3-Wire
Serial
Interface
V
REF
10
μ
F
0.1
μ
F
–
5V
±
V
REF
+5V
OPA703
The 68HC11 should be configured so that its CPOL bit is a
0 and its CPHA bit is a 1, this configuration causes data
appearing on the MOSI output to be valid on the falling edge
of SCK. When data is being transmitted to the DAC, the
SYNC
line is taken LOW (PC7). Serial data from the 68HC11
is transmitted in 8-bit bytes with only eight falling clock edges
occurring in the transmit cycle, data is transmitted MSB first.
In order to load data to the DAC8501, PC7 is left LOW after
the first eight bits are transferred, then a second and third
serial write operation is performed to the DAC and PC7 is
taken HIGH at the end of this procedure.
APPLICATIONS
USING REF02 AS A POWER SUPPLY FOR THE DAC8501
Due to the extremely low supply current required by the
DAC8501, an alternative option is to use a REF02 +5V
precision voltage reference to supply the required voltage to
the part, as shown in Figure 9. This is especially useful if the
power supply is quite noisy or if the system supply voltages
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