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參數(shù)資料
| 型號： | DAC8512EP |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT SRL LP 5V 8-DIP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時(shí)間： | 16µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 2.5mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 62.5k |
DAC8512
–11–
REV. A
Table III. Bipolar Code Table
Hexadecimal Number
Decimal Number
Analog Output
in DAC Register
Voltage (V)
F
FF
4095
–4.9976
801
2049
–2.44E–3
800
2048
0
7FF
2047
+2.44E–3
000
0
+5
To maintain monotonicity and accuracy, R1, R2, and R4 should
be selected to match within 0.01% and must all be of the same
(preferably metal foil) type to assure temperature coefficient
matching. Mismatching between R1 and R2 causes offset and gain
errors while an R4 to R1 and R2 mismatch yields gain errors.
For applications that do not require high accuracy, the circuit
illustrated in Figure 29 can also be used to generate a bipolar
output voltage. In this circuit, only one op amp is used and no
potentiometers are used for offset and gain trim. The output
voltage is coded in offset binary and is given by:
VO = 1 mV
× Digital Code ×
R4
R3
+ R4
×
1
+
R2
R1
–2.5
×
R2
R1
43.2k + 499
R1
10k
2.5V
5V
VOUT RANGE
R2
10k
20k
R3
10k
R4
15.4k + 274
4
6
1
8
4
2
3
5
2
4
6
7
8
1
2
CS
CLR
LD
SCLK
SDI
VDD
GND
DAC8512
+5V
0.1F
+2.5V
R1
R2
REF03
+5V
–5V
A1 = 1/2 OP295
R3
R4
VO
+5V
0.1F
A1
Figure 29. Bipolar Output Operation without Trim
For the
±2.5 V output range and the circuit values shown in the
table, the transfer equation becomes:
VO = 1.22 mV
× Digital Code – 2.5 V
Similarly, for the
±5 V output range, the transfer equation
becomes:
VO = 2.44 mV
× Digital Code – 5 V
Generating a Negative Supply Voltage
Some applications may require bipolar output configuration but
only have a single power supply rail available. This is very com-
mon in data acquisition systems using microprocessor-based
systems. In these systems, +12 V, +15 V, and/or +5 V are only
available. Shown in Figure 30 is a method of generating a nega-
tive supply voltage using one CD4049, a CMOS hex inverter,
operating on +12 V or +15 V. The circuit is essentially a charge
pump where two of the six are used as an oscillator. For the val-
ues shown, the frequency of oscillation is approximately 3.5 kHz
and is fairly insensitive to supply voltage because R1 > 2
× R2.
The remaining four inverters are wired in parallel for higher out-
put current. The square wave output is level translated by C2 to
a negative-going signal, rectified using a pair of 1N4001s, and
then filtered by C3. With the values shown, the charge pump
will provide an output voltage of –5 V for current loadings in the
range 0.5 mA
≤ I
OUT
≤ 10 mA with a +15 V supply and 0.5 mA
≤ I
OUT
≤ 7 mA with a +12 V supply.
910
6
11
12
14
15
7
32
5
4
R2
5.1k
R1
510k
C1
0.02
F
C2
47
F
D1
1N4001
C3
47
F
1N5231
5.1V
ZENER
D2
1N4001
R3
470
–5V
INVERTERS = CD4049
Figure 30. Generating a –5 V Supply When Only +12 V
or +15 V Is Available
A High-Compliance, Digitally Controlled Precision Current
Source
The circuit in Figure 31 shows the DAC8512 controlling a
high-compliance precision current source using an AMP05 in-
strumentation amplifier. The AMP05’s reference pin becomes
the input, and the “old” inputs now monitor the voltage across a
precision current sense resistor, RCS. Voltage gain is set to unity,
so the transfer function is given by the following equation:
IOUT =
VIN
RCS
If RCS equals 100
, the output current is limited to +10 mA
with a 1 V input. Therefore, each DAC LSB corresponds to
2.4
A. If a bipolar output current is required, then the circuit
in Figure 28 can be modified to drive the AMP05’s reference
pin with a
±1 V input signal.
Potentiometer P1 trims the output current to zero with the in-
put at 0 V. Fine gain adjustment can be accomplished by adjust-
ing R1 or R2.
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