參數(shù)資料
型號: DAC8512FS
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: % V, Serial Input Complete 12-Bit DAC
中文描述: SERIAL INPUT LOADING, 16 us SETTLING TIME, 12-BIT DAC, PDSO8
封裝: SOIC-8
文件頁數(shù): 13/20頁
文件大小: 757K
代理商: DAC8512FS
DAC8512
–13–
REV. A
Opto-Isolated Interfaces for Process Control Environments
In many process control type applications, it is necessary to pro-
vide an isolation barrier between the controller and the unit be-
ing controlled. Opto-isolators can provide isolation in excess of
3 kV. The serial loading structure of the DAC8512 makes it
ideal for opto-isolated interfaces as the number of interface lines
is kept to a minimum.
Illustrated in Figure 34 is an opto-isolated interface using the
DAC8512. In this circuit, the
CS
line is always LOW to enable
the DAC, and the 10 k
/1
μ
F combination connected to the
DAC’s
CLR
pin sets a turn-on time constant of 10 ms to reset
the DAC upon application of power. Three opto-couplers are
then used for the SDI, SCLK, and
LD
lines.
Often times reducing the number of interface lines to two lines
is required in many control environments. The circuit illustrated
in Figure 35 shows how to convert a two-line interface into the
three control lines required to control the DAC8512 without us-
ing one shots. This technique uses a counter to keep track of the
clock cycles and, when all the data has been input to the DAC,
the external logic generates the
LD
pulse.
0.1
μ
F
+5V
5
6
8
DAC8512
1
CS
3
4
7
2
0.1
μ
F
10k
+5V
VOUT
+5V
+5V
+5V
10k
SCLK
10k
10k
LD
LD
SCLK
SDI
+5V
+5V
POWER
HIGH VOLTAGE
Figure 34. An Opto-Isolated DAC Interface
+5V
+5V
10k
10k
SCLK
SDI
+5V
REG
+5V
POWER
HIGH VOLTAGE
74HC161
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CLR
CLK
A
B
C
D
ENP
GND
V
CC
RCO
Q
A
Q
B
Q
C
Q
D
ENT
LOAD
+5V
10k
NC
NC
NC
0.1
μ
F
+5V
+5V
10k
X
1
2
3
Y
4
5
6
1/4 74HCOO
1/4 74HCOO
V
DD
0.1
μ
F
3
5
8
DAC8512
1
+5V
4
LD
SCLK
SDI
7
6
CLR
GND
V
OUT
CS
2
+5V
10k
1
μ
F
Figure 35. A Two-Wire, Opto-lsolated DAC Interface
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