參數(shù)資料
型號(hào): DAC8531E/2K5
廠商: Texas Instruments
文件頁(yè)數(shù): 22/27頁(yè)
文件大小: 0K
描述: IC D/A CONV LP 16-BIT 8-MSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Basics
標(biāo)準(zhǔn)包裝: 2,500
設(shè)置時(shí)間: 8µs
位數(shù): 16
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 720µW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 93k
配用: 296-13548-ND - EVAL MOD FOR DAC8531
DAC8531
4
SBAS192B
www.ti.com
SERIAL WRITE OPERATION
SCLK
SYNC
D
IN
DB23
DB0
t
8
t
3
t
2
t
7
t
4
t
5
t
6
t
1
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNITS
t1(3)
SCLK Cycle Time
VDD = 2.7V to 3.6V
50
ns
VDD = 3.6V to 5.5V
33
ns
t2
SCLK HIGH Time
VDD = 2.7V to 3.6V
13
ns
VDD = 3.6V to 5.5V
13
ns
t3
SCLK LOW Time
VDD = 2.7V to 3.6V
22.5
ns
VDD = 3.6V to 5.5V
13
ns
t4
SYNC to SCLK Rising
Edge Setup Time
VDD = 2.7V to 3.6V
0
ns
VDD = 3.6V to 5.5V
0
ns
t5
Data Setup Time
VDD = 2.7V to 3.6V
5
ns
VDD = 3.6V to 5.5V
5
ns
t6
Data Hold Time
VDD = 2.7V to 3.6V
4.5
ns
VDD = 3.6V to 5.5V
4.5
ns
t7
SCLK Falling Edge to
SYNC Rising Edge
VDD = 2.7V to 3.6V
0
ns
VDD = 3.6V to 5.5V
0
ns
t8
Minimum SYNC HIGH Time
VDD = 2.7V to 3.6V
50
ns
VDD = 3.6V to 5.5V
33
ns
NOTES: (1) All input signals are specified with tR = tF = 5ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. (2) See Serial Write Operation timing
diagram, below. (3) Maximum SCLK frequency is 30MHz at VDD = +3.6V to +5.5V and 20MHz at VDD = +2.7V to +3.6V.
TIMING CHARACTERISTICS(1, 2)
V
DD = +2.7V to +5.5V; all specifications –40°C to +105°C unless otherwise noted.
DAC8531E
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