參數(shù)資料
型號: DAC8562FS
廠商: Analog Devices Inc
文件頁數(shù): 16/16頁
文件大小: 0K
描述: IC DAC 12BIT PARALLEL 5V 20-SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 37
設(shè)置時間: 16µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 30mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 20-SOIC W
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 62.5k
DAC8562
REV. A
–9–
APPLICATIONS SECTION
Power Supplies, Bypassing, and Grounding
All precision converter products require careful application of
good grounding practices to maintain full-rated performance.
Because the DAC8562 has been designed for +5 V applications,
it is ideal for those applications under microprocessor or micro-
computer control. In these applications, digital noise is preva-
lent; therefore, special care must be taken to assure that its
inherent precision is maintained. This means that particularly
good engineering judgment should be exercised when address-
ing the power supply, grounding, and bypassing issues using the
DAC8562.
The power supply used for the DAC8562 should be well filtered
and regulated. The device has been completely characterized for
a +5 V supply with a tolerance of
±5%. Since a +5 V logic sup-
ply is almost universally available, it is not recommended to
connect the DAC directly to an unfiltered logic supply without
careful filtering. Because it is convenient, a designer might be
inclined to tap a logic circuit s supply for the DAC’s supply.
Unfortunately, this is not wise because fast logic with nanosec-
ond transition edges induces high current pulses. The high tran-
sient current pulses can generate glitches hundreds of millivolts
in amplitude due to wiring resistances and inductances. This
high frequency noise will corrupt the analog circuits internal to
the DAC and cause errors. Even though their spike noise is
lower in amplitude, directly tapping the output of a +5 V system
supplies can cause errors because these supplies are of the
switching regulator type that can and do generate a great deal of
high frequency noise. Therefore, the DAC and any associated
analog circuitry should be powered directly from the system
power supply outputs using appropriate filtering. Figure 28
illustrates how a clean, analog-grade supply can be generated
from a +5 V logic supply using a differential LC filter with sepa-
rate power supply and return lines. With the values shown, this
filter can easily handle 100 mA of load current without saturat-
ing the ferrite cores. Higher current capacity can be achieved
with larger ferrite cores. For lowest noise, all electrolytic capaci-
tors should be low ESR (Equivalent Series Resistance) type.
100F
ELECT.
10-22F
TANT.
0.1F
CER.
TTL/CMOS
LOGIC
CIRCUITS
+5V
POWER SUPPLY
+5V
RETURN
FERRITE BEADS:
2 TURNS, FAIR-RITE
#2677006301
Figure 28. Properly Filtering a +5 V Logic Supply
Can Yield a High Quality Analog Supply
The DAC8562 includes two ground connections in order to
minimize system accuracy degradation arising from grounding
errors. The two ground pins are designated DGND (Pin 10)
and AGND (Pin 12). The DGND pin is the return for the digi-
tal circuit sections of the DAC and serves as their input thresh-
old reference point. Thus DGND should be connected to the
same ground as the circuitry that drives the digital inputs.
Pin 12, AGND, serves as the supply rail for the internal voltage
reference and the output amplifier. This pin should also serve as
the reference point for all analog circuitry associated with the
DAC8562. Therefore, to minimize any errors, it is recom-
mended that the AGND connection of the DAC8562 be con-
nected to a high quality analog ground. If the system contains
any analog signal path carrying a significant amount of current,
then that path should have its own return connection to Pin 12.
It is often advisable to maintain separate analog and digital
grounds throughout a complete system, tying them common to
one place only. If the common tie point is remote and an acci-
dental disconnection of that one common tie point were to
occur due to card removal with power on, a large differential
voltage between the two commons could develop. To protect
devices that interface to both digital and analog parts of the sys-
tem, such as the DAC8562, it is recommended that the com-
mon ground tie points be provided at each such device. If only
one system ground can be connected directly to the DAC8562,
it recommended that the analog common be used. If the
system’s AGND has suitably low impedance, then the digital
signal currents flowing in it should not seriously affect the
ground noise. The amount of digital noise introduced by con-
necting the two grounds together at the device will not adversely
affect system performance due to loss of digital noise immunity.
Generous bypassing of the DAC’s supply goes a long way in re-
ducing supply line-induced errors. Local supply bypassing con-
sisting of a 10
F tantalum electrolytic in parallel with a 0.1 F
ceramic is recommended. The decoupling capacitors should be
connected between the DAC’s supply pin (Pin 20) and the ana-
log ground (Pin 12). Figure 29 shows how the DGND, AGND,
and bypass connections should be made to the DAC8562.
15
16
DGND
AGND
VDD
DATA
13
DAC-8562
12
10F
0.1F
VOUT
TO OTHER
ANALOG CIRCUITS
20
+5V
10
TO POWER GROUND
CE
CLR
Figure 29. Recommended Grounding and Bypassing
Scheme for the DAC-8562
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