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LTC2489
12
2489fa
result in binary two’s complement format. The remaining
six bits are always 0.
As long as the voltage on the selected input channels (IN+
and IN–) remains between –0.3V and VCC + 0.3V (absolute
maximum operating range) a conversion result is gener-
ated for any differential input voltage VIN from –FS = –0.5
VREF to +FS = 0.5 VREF. For differential input voltages
greater than +FS, the conversion result is clamped to the
value corresponding to +FS. For differential input voltages
below –FS, the conversion result is clamped to the value
–FS – 1LSB.
Table 2. LTC2489 Status Bits
Input Range
Bit 23
SIG
Bit 22
MSB
VIN ≥ FS
1
0V ≤ VIN < FS
1
0
–FS ≤ VIN < 0V
0
1
VIN < –FS
0
INPUT DATA FORMAT
The LTC2489 serial input is 8 bits long and is written into
the device in one 8-bit word. SGL, ODD, A2, A1, A0 are
used to select the input channel.
After power-up, the device initiates an internal reset cycle
which sets the input channel to CH0-CH1 (IN+ = CH0,
IN– = CH1). The first conversion automatically begins
at power-up using this default input channel. Once the
Table 1. Output Data Format
Differential Input Voltage
VIN*
Bit 23
SIG
Bit 22
MSB
Bit 21
Bit 20
Bit 19
…
Bit 6
LSB
Bits 5-0
Always 0
VIN* ≥ FS**
1
0
…
0
000000
FS** – 1LSB
1
0
1
…
1
000000
0.5 FS**
1
0
1
0
…
0
000000
0.5 FS** – 1LSB
1
0
1
…
1
000000
0
1
0
…
0
000000
–1LSB
0
1
…
1
000000
–0.5 FS**
0
1
0
…
0
000000
–0.5 FS** – 1LSB
0
1
0
1
…
1
000000
–FS**
0
1
0
…
0
000000
VIN* < –FS**
0
1
…
1
000000
*The differential input voltage VIN = IN+ – IN–. **The full-scale voltage FS = 0.5 VREF.
conversion is complete, a new channel may be written
into the device.
The first three bits of the input word consist of two pre-
amble bits and one enable bit. These three bits are used
to enable the input channel selection. Valid settings for
these three bits are 000, 100, and 101. Other combinations
should be avoided.
If the first three bits are 000 or 100, the following data
is ignored (don’t care) and the previously selected input
channel remains valid for the next conversion.
If the first three bits shifted into the device are 101, then
the next five bits select the input channel for the next
conversion cycle (see Table 3).
APPLICATIONS INFORMATION
Table 3 Channel Selection
MUX ADDRESS
CHANNEL SELECTION
SGL
ODD/
SIGN
A2A1A0
0
1
2
3
COM
*0
0000
IN+
IN–
00001
IN+
IN–
01000
IN–
IN+
01001
IN–
IN+
10000
IN+
IN–
10001
IN+
IN–
11000
IN+
IN–
11001
IN+
IN–
*Default at power-up
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