參數(shù)資料
型號: DC1012A-A
廠商: Linear Technology
文件頁數(shù): 16/34頁
文件大?。?/td> 0K
描述: BOARD DELTA SIGMA ADC LTC2499
軟件下載: QuikEval System
設(shè)計資源: DC1012A Schematic
DC1012A Design File
標準包裝: 1
系列: Easy Drive™, QuikEval™
ADC 的數(shù)量: 1
位數(shù): 24
采樣率(每秒): 7.5
數(shù)據(jù)接口: I²C,串行
已用 IC / 零件: LTC2499
已供物品:
相關(guān)產(chǎn)品: LTC2499CUHF#TRPBF-ND - IC ADC 24BIT DELTA SIG 38-QFN
LTC2499IUHF#TRPBF-ND - IC ADC 24BIT DELTA SIG 38-QFN
LTC2499IUHF#PBF-ND - IC ADC 24BIT DELTA SIG 38-QFN
LTC2499CUHF#PBF-ND - IC ADC 24BIT DELTA SIG 38-QFN
LTC2499
2499fd
selects the device, the LTC2499 generates a NACK signal
indicating the conversion cycle is in progress.
Continuous Read/Write
Once the conversion cycle is concluded, the LTC2499
can be written to and then read from using the repeated
START (Sr) command.
Figure 8 shows a cycle which begins with a data write, a
repeated START, followed by a read and concluded with a
STOP command. The following conversion begins after
all 32 bits are read out of the device or after a STOP com-
mand.Thefollowingconversionwillbeperformedusingthe
newly programmed data. In cases where the same speed
(1x/2x mode) and rejection frequency (50Hz, 60Hz, 50Hz
and 60Hz) is used but the channel is changed, a STOP or
repeated START may be issued after the first byte (channel
selection data) is written into the device.
Discarding a Conversion Result and Initiating a New
Conversion with Optional Write
At the conclusion of a conversion cycle, a write cycle
can be initiated. Once the write cycle is acknowledged, a
STOP command will start a new conversion. If a new input
Figure 10. Synchronize Multiple LTC2499s with a Global Address Call
channel or conversion configuration is required, this data
can be written into the device and a STOP command will
initiate the next conversion (see Figure 9).
Synchronizing Multiple LTC2499s with a Global
Address Call
In applications where several LTC2499s (or other I2C
delta-sigma ADCs from Linear Technology Corporation)
are used on the same I2C bus, all converters can be syn-
chronized through the use of a global address call. Prior
to issuing the global address call, all converters must have
completed a conversion cycle. The master then issues a
START,followedbytheglobaladdress1110111,andawrite
request. All converters will be selected and acknowledge
the request. The master then sends a write byte (optional)
followedbytheSTOPcommand.Thiswillupdatethechan-
nel selection (optional) converter configuration (optional)
and simultaneously initiate a START of conversion for all
delta-sigma ADCs on the bus (see Figure 10). In order
to synchronize multiple converters without changing the
channel or configuration, a STOP may be issued after
acknowledgement of the global write command. Global
read commands are not allowed and the converters will
NACK a global read request.
applications inForMation
GLOBAL ADDRESS
SCL
SDA
LTC2499
ALL LTC2499s IN SLEEP
CONVERSION OF ALL LTC2499s
DATA INPUT
S
W ACK WRITE (OPTIONAL)
P
2499 F10
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