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參數(shù)資料
| 型號： | DC1186A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 2/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD SAR ADC LTC2308 |
| 軟件下載： | QuikEval System |
| 設(shè)計資源： | DC1186A Design File DC1186A Schematic |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | QuikEval™ |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 500k |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 已用 IC / 零件： | LTC2308 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | LTC2308IUF#TRPBF-ND - IC ADC 12BIT 500KSPS 24-QFN LTC2308CUF#TRPBF-ND - IC ADC 12BIT 500KSPS 24-QFN LTC2308IUF#PBF-ND - IC ADC 12BIT 8CH 500KSPS 24-QFN LTC2308CUF#PBF-ND - IC ADC 12BIT 8CH 500KSPS 24-QFN |
LTC2308
10
2308fb
APPLICATIONS INFORMATION
Overview
The LTC2308 is a low noise, 500ksps, 8-channel, 12-bit
successive approximation register (SAR) A/D converter.
The LTC2308 includes a precision internal reference, a
congurable 8-channel analog input multiplexer (MUX)
and an SPI-compatible serial port for easy data transfers.
The ADC may be congured to accept single-ended or
differential signals and can operate in either unipolar or
bipolar mode. A sleep mode option is also provided to
save power during inactive periods.
Conversions are initiated by a rising edge on the CONVST
input. Once a conversion cycle has begun, it cannot be
restarted. Between conversions, a 6-bit input word (DIN)
at the SDI input congures the MUX and programs vari-
ous modes of operation. As the DIN bits are shifted in,
data from the previous conversion is shifted out on SDO.
After the 6 bits of the DIN word have been shifted in, the
ADC begins acquiring the analog input in preparation for
the next conversion as the rest of the data is shifted out.
The acquire phase requires a minimum time of 240ns
for the sample-and-hold capacitors to acquire the analog
input signal.
During the conversion, the internal 12-bit capacitive
charge-redistribution DAC output is sequenced through a
successive approximation algorithm by the SAR starting
from the most signicant bit (MSB) to the least signicant
bit (LSB). The sampled input is successively compared
with binary weighted charges supplied by the capacitive
DAC using a differential comparator. At the end of a conver-
sion, the DAC output balances the analog input. The SAR
contents (a 12-bit data word) that represent the sampled
analog input are loaded into 12 output latches that allow
the data to be shifted out.
Programming the LTC2308
The various modes of operation of the LTC2308 are
programmed by a 6-bit DIN word. The SDI data bits are
loaded on the rising edge of SCK, with the S/D bit loaded
on the rst rising edge and the SLP bit on the sixth rising
edge (see Figure 8 in the Timing and Control section). The
input data word is dened as follows:
S/D = SINGLE-ENDED/DIFFERENTIAL BIT
O/S = ODD/SIGN BIT
S1 = ADDRESS SELECT BIT 1
S0 = ADDRESS SELECT BIT 0
UNI = UNIPOLAR/BIPOLAR BIT
SLP = SLEEP MODE BIT
Analog Input Multiplexer
The analog input MUX is programmed by the S/D, O/S,
S1 and S0 bits of the DIN word. Table 1 lists the MUX
congurations for all combinations of the conguration
bits. Figure 1a shows several possible MUX congurations
and Figure 1b shows how the MUX can be recongured
from one conversion to the next.
S/D
O/S
S1
S0
UNI
SLP
Table 1. Channel Conguration
S/D O/S S1
S0
01234567
COM
0000+–
0001
+–
0010
+–
0011
+–
0100–+
0101
–+
0110
–+
0111
–+
1000+
–
1001
+
–
1010
+
–
1011
+
–
1100
+
–
1101
+
–
1110
+
–
1111
+
–
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| DC1190A-A | 功能描述:BOARD SAR ADC LTC2366 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:QuikEval™ 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| DC1190A-B | 功能描述:BOARD SAR ADC LTC2365 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:QuikEval™ 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
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