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參數(shù)資料
| 型號： | DC245A-A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 23/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL LTC1668 |
| 設(shè)計資源： | DC245A Design File DC245A Schematic |
| 標(biāo)準包裝： | 1 |
| DAC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 50M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 設(shè)置時間： | 20ns |
| DAC 型： | 電流 |
| 工作溫度： | 0°C ~ 70°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | LTC1668 |
| 相關(guān)產(chǎn)品： | LTC1668CG#PBF-ND - IC DAC 16BIT 50MSPS 28-SSOP LTC1668IG#PBF-ND - IC D/A CONV 16BIT 50MSPS 28-SSOP LTC1668CG#TRPBF-ND - IC D/A CONV 16BIT 50MSPS 28-SSOP LTC1668IG#TRPBF-ND - IC D/A CONV 16BIT 50MSPS 28-SSOP LTC1668IG-ND - IC DAC 16BIT 50MSPS 28SSOP LTC1668IG#TR-ND - IC DAC 16BIT 50MSPS 28SSOP LTC1668CG#TR-ND - IC DAC 16BIT 50MSPS 28SSOP LTC1668CG-ND - IC D/A CONV 16BIT 50MSPS 28-SSOP |
8
LTC1666/LTC1667/LTC1668
LTC1667
REFOUT (Pin 15): Internal Reference Voltage Output.
Nominal value is 2.5V. Requires a 0.1
F bypass capacitor
to AGND.
IREFIN (Pin 16): Reference Input Current. Nominal value is
1.25mA for IFS = 10mA. IFS = IREFIN 8.
AGND (Pin 17): Analog Ground.
LADCOM (Pin 18): Attenuator Ladder Common. Normally
tied to GND.
IOUT B (Pin 19): Complementary DAC Output Current. Full-
scale output current occurs when all data bits are 0s.
IOUT A (Pin 20): DAC Output Current. Full-scale output
current occurs when all data bits are 1s.
COMP1 (Pin 21): Current Source Control Amplifier Com-
pensation. Bypass to VSS with 0.1F.
COMP2 (Pin 22): Internal Bypass Point. Bypass to VSS
with 0.1
F.
VSS (Pin 23): Negative Supply Voltage. Nominal value is
– 5V.
DGND (Pin 24): Digital Ground.
VDD (Pin 25): Positive Supply Voltage. Nominal value is 5V.
CLK (Pin 26): Clock Input. Data is latched and the output
is updated on positive edge of clock.
DB13 to DB0 (Pins 27, 28, 1 to 12 ): Digital Input Data Bits.
LTC1668
REFOUT (Pin 15): Internal Reference Voltage Output.
Nominal value is 2.5V. Requires a 0.1
F bypass capacitor
to AGND.
IREFIN (Pin 16): Reference Input Current. Nominal value is
1.25mA for IFS = 10mA. IFS = IREFIN 8.
AGND (Pin 17): Analog Ground.
LADCOM (Pin 18): Attenuator Ladder Common. Normally
tied to GND.
IOUT B (Pin 19): Complementary DAC Output Current. Full-
scale output current occurs when all data bits are 0s.
IOUT A (Pin 20): DAC Output Current. Full-scale output
current occurs when all data bits are 1s.
COMP1 (Pin 21): Current Source Control Amplifier Com-
pensation. Bypass to VSS with 0.1F.
COMP2 (Pin 22): Internal Bypass Point. Bypass to VSS
with 0.1
F.
VSS (Pin 23): Negative Supply Voltage. Nominal value is
– 5V.
DGND (Pin 24): Digital Ground.
VDD (Pin 25): Positive Supply Voltage. Nominal value is 5V.
CLK (Pin 26): Clock Input. Data is latched and the output
is updated on positive edge of clock.
DB15 to DB0 (Pins 27, 28, 1 to 14 ): Digital Input Data Bits.
UU
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PI FU CTIO S
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