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參數(shù)資料
| 型號： | DC887A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 1/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD SAR ADC LTC1408 |
| 軟件下載： | QuikEval II System |
| 設計資源： | DC887A Design File DC887A Schematic |
| 標準包裝： | 1 |
| 系列： | QuikEval-II™ |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 600k |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | ±1.25 V |
| 工作溫度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC1408 |
| 已供物品： | 板 |
| 相關產品： | LTC1408CUH-ND - IC ADC 14BIT 600KSPS 32-QFN LTC1408CUH-12#TRPBF-ND - IC ADC 12BIT 600KSPS 32-QFN LTC1408IUH-12#TRPBF-ND - IC ADC 12BIT 600KSPS 32-QFN LTC1408IUH#TRPBF-ND - IC ADC 14BIT 600KSPS 32-QFN LTC1408CUH#TRPBF-ND - IC ADC 14BIT 600KSPS 32-QFN LTC1408IUH-12#PBF-ND - IC ADC 12BIT 600KSPS 32-QFN LTC1408CUH-12#PBF-ND - IC ADC 12BIT 600KSPS 32-QFN LTC1408IUH#PBF-ND - IC ADC 14BIT 600KSPS 32-QFN LTC1408CUH#PBF-ND - IC ADC 14BIT 600KSPS 32-QFN |
1
LTC1408
1408fa
6 Channel, 14-Bit, 600ksps
Simultaneous Sampling ADC
with Shutdown
The LTC
1408 is a 14-bit, 600ksps ADC with six simulta-
neously sampled differential inputs. The device draws
only 5mA from a single 3V supply, and comes in a tiny 32
pin (5mm
× 5mm) QFN package. A SLEEP shutdown
feature lowers power consumption to 6
W. The combina-
tion of low power and tiny package makes the LTC1408
suitable for portable applications.
The LTC1408 contains six separate differential inputs that
are sampled simultaneously on the rising edge of the
CONV signal. These six sampled inputs are then
converted at a rate of 100ksps per channel.
The 90dB common mode rejection allows users to
eliminate ground loops and common mode noise by
measuring signals differentially from the source.
The device converts 0V to 2.5V unipolar inputs differen-
tially, or
±1.25V bipolar inputs also differentially,
depending on the state of the BIP pin. Any analog input
may swing rail-to-rail as long as the differential input
range is maintained.
The conversion sequence can be abbreviated to convert
fewer than six channels, depending on the logic state of
the SEL2, SEL1 and SEL0 inputs.
The serial interface sends out the six conversion results in
96 clocks for compatibility with standard serial interfaces.
■ 600ksps ADC with 6 Simultaneously Sampled
Differential Inputs
■ 100ksps Throughput per Channel
■ 76dB SINAD
■ Low Power Dissipation: 15mW
■ 3V Single Supply Operation
■ 2.5V Internal Bandgap Reference, Can be Overdriven
with External Reference
■ 3-Wire Serial Interface
■ Internal Conversion Triggered by CONV
■ SLEEP (6
W) Shutdown Mode
■ NAP (3.3mW) Shutdown Mode
■ 0V to 2.5V Unipolar, or
±1.25V Bipolar Differential
Input Range
■ 90dB Common Mode Rejection
■ Tiny 32-Pin (5mm
××××× 5mm) QFN Package
■ Multiphase Power Measurement
■
Multiphase Motor Control
■ Data Acquisition Systems
■ Uninterruptable Power Supplies
APPLICATIO S
U
FEATURES
DESCRIPTIO
U
BLOCK DIAGRA
W
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All
other trademarks are the property of their respective owners. Protected by U.S. Patents
including 6084440, 6522187.
–
+
4
5
25
24
–
+
7
6
9
12
13
16
19
8
CH0–
CH0+
CH1–
CH1+
10
11
–
+
14
15
CH2–
CH2+
CH3–
CH3+
–
+
17
18
–
+
20
21
S AND H
CH4–
CH4+
CH5–
CH5+
MUX
VREF
10
F
BIP
SEL2 SEL1 SEL0
GND
2.5V
REFERENCE
600ksps
14-BIT ADC
14-BIT LATCH 5
14-BIT LATCH 4
14-BIT LATCH 3
14-BIT LATCH 2
14-BIT LATCH 1
14-BIT LATCH 0
10
F3V
VCC
VDD
26
29
23
22
33
27
28
2
1
SD0
0.1
F
3
OVDD
3V
32
SCK
31
DGND
OGND
30
CONV
THREE-
STATE
SERIAL
OUTPUT
PORT
TIMING
LOGIC
1408 TA01
–
+
S AND H
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