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參數(shù)資料
| 型號(hào)： | DDU4C-5200MC2 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS, Low Voltage, RF/ Video, SPDT Switch (Single Pole, Double Throw) |
| 中文描述： | 5，技術(shù)咨詢，HCMOS界面的固定延遲線（系列DDU4C） |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 65K |
| 代理商： | DDU4C-5200MC2 |
DDU4C
Doc #97034
12/10/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
5-TAP, HCMOS-INTERFACED
FIXED DELAY LINE
(SERIES DDU4C)
FEATURES
PACKAGES
Five equally spaced outputs
Fits standard 8-pin DIP socket
Low profile
Auto-insertable
Input & outputs fully CMOS interfaced & buffered
10 T
2
L fan-out capability
FUNCTIONAL DESCRIPTION
The DDU4C-series device is a 5-tap digitally buffered delay line. The
signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an
amount determined by the device dash number (See Table). The total
delay of the line is measured from IN to T5. The nominal tap-to-tap delay
increment is given by one-fifth of the total delay.
SERIES SPECIFICATIONS
Minimum input pulse width:
20% of total delay
Output rise time:
8ns typical
Supply voltage:
5VDC
±
5%
Supply current:
I
CCL
= 40
μ
a typical
I
CCH
= 10ma typical
Operating temperature:
0
°
to 70
°
C
Temp. coefficient of total delay:
300 PPM/
°
C
20%
20%
20%
20%
20%
VDD
GND
IN
T1
T2
T3
T4
T5
DDU4C Functional diagram
1997 Data Delay Devices
data
delay
devices,
inc.
3
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IN
N/C
N/C
T2
N/C
T4
GND
VDD
N/C
T1
N/C
T3
N/C
T5
14
12
10
8
1
4
6
7
IN
T2
T4
GND
VCC
T1
T3
T5
DIP
DDU4C-xx
DDU4C-xxM Military
Comm.
SMD
DDU4C-xxA2
DDU4C-xxB2
DDU4C-xxMC2 Military
Comm.
Comm.
PIN DESCRIPTIONS
IN
T1-T5
VDD
GND
Signal Input
Tap Outputs
+5 Volts
Ground
DASH NUMBER SPECIFICATIONS
Part
Number
DDU4C-5050
DDU4C-5060
DDU4C-5075
DDU4C-5100
DDU4C-5125
DDU4C-5150
DDU4C-5200
DDU4C-5250
DDU4C-5300
DDU4C-5400
DDU4C-5500
Total
Delay (ns)
50
±
2.5
60
±
3.0
75
±
4.0
100
±
5.0
125
±
6.5
150
±
7.5
200
±
10.0
250
±
12.5
300
±
15.0
400
±
20.0
500
±
25.0
Delay Per
Tap (ns)
10.0
±
3.0
12.0
±
3.0
15.0
±
3.0
20.0
±
3.0
25.0
±
3.0
30.0
±
3.0
40.0
±
4.0
50.0
±
5.0
60.0
±
6.0
80.0
±
8.0
100.0
±
10.0
NOTE: Any dash number between 5050 and 5500
not shown is also available.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DDU4C-5250A2 | 5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C) |
| DDU4C-5250B2 | 5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C) |
| DDU4C-5250M | CMOS Low Voltage, 3 O 8-Channel Multiplexer |
| DDU4C-5250MC2 | 5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C) |
| DDU4C-5500M | 5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DDU4C-5250 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C) |
| DDU4C-5250A2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C) |
| DDU4C-5250B2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C) |
| DDU4C-5250M | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C) |
| DDU4C-5250MC2 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C) |
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