Family of Microcontrollers Analog Interfac" />
參數(shù)資料
型號: DF36037GHV
廠商: Renesas Electronics America
文件頁數(shù): 4/46頁
文件大?。?/td> 0K
描述: IC H8/36037F MCU FLASH 64QFP
產(chǎn)品培訓(xùn)模塊: CAN Basics Part-1
CAN Basics Part-2
R8C Product Overview
H8S Family Overview
H8 Tiny Microcontrollers CPU Architecture
Electromagnetic Noise Reduction Techniques Part 1
Digital to Analog Converter Part 1
Digital to Analog Converter Part 2
標準包裝: 1
系列: H8® H8/300H 微型
核心處理器: H8/300H
芯體尺寸: 16-位
速度: 20MHz
連通性: CAN,SCI,SSU
外圍設(shè)備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 45
程序存儲器容量: 56KB(56K x 8)
程序存儲器類型: 閃存
RAM 容量: 3K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -20°C ~ 75°C
封裝/外殼: 64-BQFP
包裝: 托盤
配用: R0K436079S000BE-ND - KIT DEV FOR H8/36079 W/COMPILER
Peripherals
10
H8
Family of Microcontrollers
Analog Interfaces
4- to 16-channel 10-bit successive-
approximation A/D converter (ADC)
2-channel, 14-bit delta-sigma ADC
2- to 4-channel 8-bit D/A converter
Timers
Rich suite of 8-bit and 16-bit
multifunction, multipurpose timers
– Input capture, output compare, auto
reload, event counter, up/down counter,
interval timer, and sleep mode timer
3-phase Motor Control Timer
– 2-phase encoder with up/down count
capability
– Suitable for motor control apps
Asynchronous Event Counter (AEC)
– Counts events even when system clock
is disabled for power saving
Watchdog timer (WDT) with inde-
pendent RC circuit for greater safety
10-bit or 14-bit Pulse Width
Modulation (PWM) timer with
ripple-reduction feature
– Can be used as a D/A converter by
adding an external low-pass filter
Real-Time Clock (RTC): seconds,
minutes, hours, days and weeks
Arbitrary Waveform Generation /
Programmable Pulse Generator
(PPG) / Timing Pattern Controller
(TPC)
Arbitrary waveform patterns are
stored in memory and generated on
output pins with the PPG or TPC in
conjunction with a timer and DMA
Provides 8/16-bit programmable pulse
outputs using TPU as base
Output trigger signals can be selected
in 4-bit groups
Each group can operate both
simultaneously and independently
Output trigger signals can operate in
parallel with DTC and DMAC
PGA
ADCR
Inter
nal
data
bu
s
PSS
Multiplexer
IRRSDADCN
fovs =
Φ
fovs =
Φ/2, Φ/4, Φ/8, Φ/16, Φ/32
Secondary
A/D converter
LCD drive power supply circuit
Reference voltage
generator
Legend
ADCR:
ADSSR:
IRRSDADCN:
ADDR:
BGRMR:
A/D conversion end interrupt request flag
A/D data register
Band-Gap Regulator (BGR) control register
Band-Gap
reference circuit
Clock interrupt
control circuit
Dout (16 bits;
14 bits are valid)
Programmable gain amplifier
System clock
Φ
ADSSR
LCD
ADDR (16 bits)
Ain1
Ain2
Vref/REF
ACOM
Buffer
BGRMR
A/D control register
A/D start/status register
H8/38086 14-bit Delta-Sigma A/D
Select clock
Bus interface
Clock
Internal data bus
DADRA
DADRB
PWX1
Internal clock
φ
φ/2
PWX0
Fine–adjustment pulse addition
Legend:
DACR:
PWM D/A control register
DADRA:
PWM D/A data register A
DADRB:
PWM D/A data register B
DACNT:
PWM D/A counter
DACR
Control
logic
Base cycle compare match A
Base cycle compare match B
Base cycle overflow
Module data bus
Comparator
A
Comparator
B
DACNT
Internal clock
32KOVI (IRQ15)
(Interrupt
request signal)
SUBCK/64
SUBCK/256
SUBCK/32
SUBCK/128
Clock
Counter
TCNT32K
TCR32K
Module bus
Clock
Select
Bus
Interface
Internal
bu
s
TK32K
H8/Tiny 14-Bit PWM Timer Block Diagram
H8S 32K Sleep Mode Timer Block Diagram
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