參數(shù)資料
型號: DG201A
廠商: Intersil Corporation
英文描述: Quad SPST, CMOS Analog Switches
中文描述: 四路SPST、CMOS模擬開關(guān)
文件頁數(shù): 4/7頁
文件大?。?/td> 71K
代理商: DG201A
4-4
Test Circuits and Waveforms
FIGURE 1. t
ON
AND t
OFF
SWITCHING TEST CIRCUIT AND MEASUREMENT POINTS
NOTES:
6.
V
O
= Measured voltage error due to charge injection.
7. The error in coulombs is Q = C
L
x
V
O
.
FIGURE 2. CHARGE INJECTION TEST CIRCUIT AND MEASUREMENT POINTS
C = 0.001
μ
F||0.1
μ
F
Chip Capacitors
FIGURE 3. OFF ISOLATION TEST CIRCUIT
C = 0.001
μ
F||0.1
μ
F
Chip Capacitors
FIGURE 4. CHANNEL TO CHANNEL CROSSTALK TEST
CIRCUIT
LOGIC “0” = SWITCH ON
50%
90%
t
OFF
LOGIC
INPUT
t
r
< 20ns
t
f
< 20ns
SWITCH
OUTPUT
V
S
3V
t
ON
V
O
S
1
IN
1
LOGIC
INPUT
GND
V
S
= 2V
R
L
1k
C
L
35pF
SWITCH
OUTPUT
15V
V+
-15V
V-
SWITCH
INPUT
(REPEAT TEST FOR
IN
2
, IN
3
AND IN
4
)
V
O
= V
S
R
L
R
L
+ r
DS(ON)
90%
SWITCH
INPUT
Logic shown for DG201A, invert for DG202.
D
1
R
S
S
X
C
L
= 1nF
V
O
D
X
IN
X
V
S
IN
X
V
O
ON
OFF
ON
SWITCH
OUTPUT
ANALYZER
CHAN A
R
L
SIGNAL
GENERATOR
V+
C
V-
-15V
C
V
S
V
D
IN
X
GND
CHAN B
V
IN
+15V
V
S
OIRR
20 Log
-------
=
0V,
2.4V
V+
V
S1
R
L
GND
IN
1
V
D1
IN
2
50
0V, 2.4V
NC
V-
-15V
V
D2
ANALYZER
CHAN A
CHAN B
SIGNAL
GENERATOR
V
S2
C
C
+15V
3
V
S
CCRR
20 Log
1
VD
2
-----------
=
DG201A, DG202
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