參數(shù)資料
型號(hào): DG201ACSE+T
廠(chǎng)商: Maxim Integrated Products
文件頁(yè)數(shù): 9/12頁(yè)
文件大?。?/td> 0K
描述: IC SWITCH QUAD SPST 16SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
功能: 開(kāi)關(guān)
電路: 4 x SPST - NC
導(dǎo)通狀態(tài)電阻: 200 歐姆
電壓電源: 雙電源
電壓 - 電源,單路/雙路(±): ±4.5 V ~ 18 V
電流 - 電源: 20µA
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 帶卷 (TR)
DG201A/DG211
Quad SPST CMOS Analog Switches
6
_______________________________________________________________________________________
RDS(ON) AT ANALOG SIGNAL LEVEL
POWER SUPPLIES
-5V
+5V
-10V
+10V
-15V
+15V
±5V
350
380
————
±10V
165
250
——
±15V
125
160
135
155
Typical RDS(ON) vs. Power Supplies for Maxim’s DG201A, and DG211
Protecting Against Fault
Conditions
Fault conditions occur when power supplies are turned
off when input signals are still present, or when over-
voltages occur at the inputs during normal operation. In
either case, source-to-body diodes can be forward
biased and conduct current from the signal source. If
this current is required to be kept to low (A) levels
then the addition of external protection diodes is rec-
ommended.
To provide protection for overvoltages up to 20V above
the supplies, a 1N4001 or 1N914 type diode should be
placed in series with the positive and negative supplies
as shown in Figure 2. The addition of these diodes will
reduce the analog signal range to 1V below the posi-
tive supply and 1V above the negative supply.
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
DG201A
DG211
IN4001
-15V
IN4001
+15V
Figure 2. Protection against Fault Conditions
LOGIC "0" - SW ON
3V
VS
0
LOGIC
INPUT
tf < 20ns
tr < 20ns
SWITCH
INPUT
SWITCH
OUTPUT
50%
0
V0
0.9
tON
V0
0.9
0.1
toff1
toff2
SWITCH
INPUT
S1
VS = +2V
IN1
LOGIC
INPUT
GND
0
V-
-15V
+15V
V+
D1
RL
1k
CL
35pF
V0
SWITCH
OUTPUT
(REPEAT TEST FOR IN2, IN3, AND IN4)
V0 = VS
RL
RL + RDS(ON)
TOP VIEW
16
15
14
13
5
1
2
3
4
12
11
10
9
67
8
S1
V-
GND
S4
S2
V+
N.C.
S3
D1
IN1
IN2
D2
D4
IN4
IN3
D3
DG201A
DG211
QFN*
Pin Configurations (continued)
Figure 1. Switching Time
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