參數(shù)資料
型號(hào): DG413ETE+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 9/12頁(yè)
文件大?。?/td> 0K
描述: IC SWITCH QUAD SPST 16TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
功能: 開(kāi)關(guān)
電路: 4 x SPST - NC/NO
導(dǎo)通狀態(tài)電阻: 35 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 10 V ~ 30 V,±4.5 V ~ 20 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-WQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 16-TQFN-EP(5x5)
包裝: 帶卷 (TR)
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
6
_______________________________________________________________________________________
__________Applications Information
Operation with Supply Voltages
Other Than 15V
Using supply voltages other than 15V will reduce the
analog signal range. The DG411/DG412/DG413 switch-
es operate with ±4.5V to ±20V bipolar supplies or with
a +10V to +30V single supply; connect V- to 0V when
operating with a single supply. Also, all device types
can operate with unbalanced supplies such as +24V
and -5V. VL must be connected to +5V to be TTL com-
patible, or to V+ for CMOS-logic level inputs. The
Typical Operating Characteristics graphs show typical
on-resistance with ±15V, ±10V, and ±5V supplies.
(Switching times increase by a factor of two or more for
operation at ±5V.)
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings because stresses beyond the listed rat-
ings may cause permanent damage to the devices.
Always sequence V+ on first, followed by VL, V-, and
logic inputs. If power-supply sequencing is not possi-
ble, add two small, external signal diodes in series with
supply pins for overvoltage protection (Figure 1).
Adding diodes reduces the analog signal range to 1V
below V+ and 1V below V-, without affecting low switch
resistance and low leakage characteristics. Device
operation is unchanged, and the difference between
V+ and V- should not exceed +44V.
V+
S
V-
D
Vg
V+
V-
Figure 1. Overvoltage Protection Using External Blocking Diodes
Pin Description
PIN
DIP/SO/TSSOP
QFN
NAME
FUNCTION
1, 16, 9, 8
15, 14, 7, 6
IN1–IN4
Input
2, 15, 10, 7
16, 13, 8, 5
D1–D4
Analog Switch Drain Terminal
3, 14, 11, 6
1, 12, 9, 4
S1–S4
Analog Switch Source Terminal
4
2
V-
Negative-Supply Voltage Input
5
3
GND
Ground
12
10
VL
Logic Supply Voltage
13
11
V+
Positive-Supply Voltage Input—Connected to Substrate
EP
Exposed Paddle (QFN Only). Connect EP to V+.
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DG413EVE 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Improved, Quad, SPST Analog Switches