參數(shù)資料
型號(hào)： DG428DN-E3
廠商： Vishay Siliconix
文件頁(yè)數(shù)： 9/14頁(yè)
文件大?。?/td> 0K
描述： IC MUX ANLG 8CH W/LATCH 20PLCC
標(biāo)準(zhǔn)包裝： 500
功能： 多路復(fù)用器
電路： 1 x 8:1
導(dǎo)通狀態(tài)電阻： 150 歐姆
電壓電源： 單/雙電源
電壓 - 電源，單路/雙路(±)： 12V，±15V
電流 - 電源： 20µA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 20-PLCC（9x9）
包裝： 管件
www.vishay.com
4
Document Number: 70063
S11-1350–Rev. K, 04-Jul-11
Vishay Siliconix
DG428, DG429
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SPECIFICATIONSa
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 15 V, V- = - 15 V, WR = 0,
RS = 2.4 V, VIN = 2.4 V, 0.8 V
f
Temp.b
Typ.c
A Suffix
- 55 °C to 125 °C
D Suffix
- 40 °C to 85 °C
Unit
Min.d
Max.d
Min.d
Max.d
Analog Switch
Analog Signal Rangee
VANALOG
Full
- 15
15
- 15
15
V
Drain-Source
On-Resistance
RDS(on)
VD = ± 10 V, VAL = 0.8 V
IS = - 1 mA, VAH = 2.4 V
Room
Full
55
100
125
100
125
Greatest Change in RDS(on)
Between Channelsg
R
DS(on)
- 10 V < VS < 10 V
IS = - 1 mA
Room
5
%
Source Off Leakage Current
IS(off)
VS = ± 10 V,
VEN = 0 V, VD = ± 10 V
Room
Full
± 0.03
- 0.5
- 50
0.5
50
- 0.5
- 50
0.5
50
nA
Drain Off Leakage Current
ID(off)
VEN = 0 V
VD = ± 10 V
VS = ± 10 V
DG428
Room
Full
± 0.07
- 1
- 100
1
100
- 1
- 100
1
100
DG429
Room
Full
± 0.05
- 1
- 50
1
50
- 1
- 50
1
50
Drain On Leakage Current
ID(on)
VS = VD = ± 10 V
VEN = 2.4 V
VAL= 0.8 V
VAH = 2.4 V
DG428
Room
Full
± 0.07
- 1
- 100
1
100
- 1
- 100
1
100
DG429
Room
Full
± 0.05
- 1
- 50
1
50
- 1
- 50
1
50
Digital Control
Logic Input Current
Input Voltage High
IAH
VA = 2.4 V
Full
0.01
1
A
VA = 15 V
Full
0.01
1
Logic Input Current
Input Voltage Low
IAL
VEN = 0 V, 2.4 V, VA = 0 V
RS = 0 V, WR = 0 V
Full
- 0.01
- 1
Logic Input Capacitance
Cin
f = 1 MHz
Room
8
pF
Dynamic Characteristics
Transition Time
tTRANS
See Figure 5
Room
Full
150
250
300
250
300
ns
Break-Before-Make Interval
tOPEN
See Figure 4
Full
30
10
Enable and Write Turn-On Time
tON(EN,WR)
See Figure 6 and 7
Room
Full
90
150
225
150
225
Enable and Reset Turn-Off Time
tOFF(EN,RS)
See Figure 6 and 8
Room
Full
55
150
300
150
300
Charge Injection
Q
VGEN = 0 V, RGEN = 0
CL = 1 nF, See Figure 9
Room
1
pC
Off Isolation
OIRR
VEN = 0 V, RL = 300
CL = 15 pF, VS = 7 VRMS
f = 100 kHz
Room
- 75
dB
Source Off Capacitance
CS(off)
VS = 0 V, VEN = 0 V, f = 1 MHz
Room
11
pF
Drain Off Capacitance
CD(off)
VD = 0 V
VEN = 0 V
f = 1 MHz
DG428
Room
40
DG429
Room
20
Drain On Capacitance
CD(on)
DG428
Room
54
DG429
Room
34
Minimum Input Timing Requirements
Write Pulse Width
tW
See Figure 2
Full
100
ns
AX, EN Data Set Up time
tS
Full
100
AX, EN Data Hold Time
tH
Full
10
Reset Pulse Width
tRS
VS = 5 V, See Figure 3
Full
100
Power Supplies
Positive Supply Current
I+
VEN = VA = 0, RS = 5 V
Room
20
100
A
Negative Supply Current
I-
Room
- 0.001
- 5
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