- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗11178 > DG445DVZ (Intersil)IC SWITCH QUAD SPST 16TSSOP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | DG445DVZ |
| 寤犲晢锛� | Intersil |
| 鏂囦欢闋佹暩(sh霉)锛� | 8/12闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC SWITCH QUAD SPST 16TSSOP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 960 |
| 鍔熻兘锛� | 闁嬮棞(gu膩n) |
| 闆昏矾锛� | 4 x SPST - NO |
| 灏�(d菐o)閫氱媭鎱�(t脿i)闆婚樆锛� | 160 姝愬 |
| 闆诲闆绘簮锛� | 鍠�/闆欓浕婧� |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 5 V ~ 34 V锛�±5 V ~ 20 V |
| 闆绘祦 - 闆绘簮锛� | 100pA |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 16-TSSOP锛�0.173"锛�4.40mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 16-TSSOP |
| 鍖呰锛� | 绠′欢 |
5
FN3586.10
June 4, 2007
Test Circuits and Waveforms
VO is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing
edge of the output waveform.
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
FIGURE 3. CROSSTALK TEST CIRCUIT
FIGURE 4. OFF ISOLATION TEST CIRCUIT
NOTE: Logic input waveform is inverted for switches that have
the opposite logic sense.
50%
tr < 20ns
tf < 20ns
tOFF
80%
3V
0V
VS
0V
tON
VO
LOGIC
INPUT
SWITCH
INPUT
SWITCH
OUTPUT
80%
Repeat test for Channels 2, 3 and 4.
For load conditions, see Specifications. CL includes fixture and
stray capacitance.
V
O
V
S
R
L
R
L
r
DS ON
()
+
------------------------------------
=
SWITCH
INPUT
LOGIC
INPUT
S1
IN1
3V
V+
D1
RL
CL
VO
GND
V-
VL
SWITCH
螖VO
INX
OFF
ON
INX
OFF
ON
Q =
螖VO x CL
(DG444)
(DG445)
OUTPUT
V+
D1
CL
VO
GND
V-
VIN = 3V
RG
VG
VL
0V, 2.4V
ANALYZER
+15V
V+
C
VS
10dBm
SIGNAL
GENERATOR
RL
GND
IN1
VD
IN2
50
惟
0V, 2.4V
NC
V-
-15V
C
VD
ANALYZER
RL
+15V
10dBm
SIGNAL
GENERATOR
V+
C
V-
-15V
C
0V, 2.4V
VS
VD
INX
GND
DG444, DG445
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| DG445DVZ-T | 鍔熻兘鎻忚堪:妯℃摤闁嬮棞(gu膩n) IC SWITCH 4X SPST N O IND RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闁嬮棞(gu膩n)鏁�(sh霉)閲�:2 闁嬮棞(gu膩n)閰嶇疆:SPDT 闁嬪暉闆婚樆锛堟渶澶у€硷級:0.1 Ohms 鍒囨彌闆诲锛堟渶澶э級: 闁嬪暉鏅傞枔锛堟渶澶у€硷級: 闂�(gu膩n)闁夋檪闁擄紙鏈€澶у€硷級: 宸ヤ綔闆绘簮闆诲:2.7 V to 4.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-16 |
| DG445DY | 鍔熻兘鎻忚堪:妯℃摤闁嬮棞(gu膩n) IC SPST Analog Switch RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闁嬮棞(gu膩n)鏁�(sh霉)閲�:2 闁嬮棞(gu膩n)閰嶇疆:SPDT 闁嬪暉闆婚樆锛堟渶澶у€硷級:0.1 Ohms 鍒囨彌闆诲锛堟渶澶э級: 闁嬪暉鏅傞枔锛堟渶澶у€硷級: 闂�(gu膩n)闁夋檪闁擄紙鏈€澶у€硷級: 宸ヤ綔闆绘簮闆诲:2.7 V to 4.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-16 |
| DG445DY+ | 鍔熻兘鎻忚堪:妯℃摤闁嬮棞(gu膩n) IC Quad SPST CMOS Normally Open RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闁嬮棞(gu膩n)鏁�(sh霉)閲�:2 闁嬮棞(gu膩n)閰嶇疆:SPDT 闁嬪暉闆婚樆锛堟渶澶у€硷級:0.1 Ohms 鍒囨彌闆诲锛堟渶澶э級: 闁嬪暉鏅傞枔锛堟渶澶у€硷級: 闂�(gu膩n)闁夋檪闁擄紙鏈€澶у€硷級: 宸ヤ綔闆绘簮闆诲:2.7 V to 4.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-16 |
| DG445DY+T | 鍔熻兘鎻忚堪:妯℃摤闁嬮棞(gu膩n) IC Quad SPST CMOS Normally Open RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闁嬮棞(gu膩n)鏁�(sh霉)閲�:2 闁嬮棞(gu膩n)閰嶇疆:SPDT 闁嬪暉闆婚樆锛堟渶澶у€硷級:0.1 Ohms 鍒囨彌闆诲锛堟渶澶э級: 闁嬪暉鏅傞枔锛堟渶澶у€硷級: 闂�(gu膩n)闁夋檪闁擄紙鏈€澶у€硷級: 宸ヤ綔闆绘簮闆诲:2.7 V to 4.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-16 |
| DG445DY-E3 | 鍔熻兘鎻忚堪:妯℃摤闁嬮棞(gu膩n) IC SPST Analog Switch RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闁嬮棞(gu膩n)鏁�(sh霉)閲�:2 闁嬮棞(gu膩n)閰嶇疆:SPDT 闁嬪暉闆婚樆锛堟渶澶у€硷級:0.1 Ohms 鍒囨彌闆诲锛堟渶澶э級: 闁嬪暉鏅傞枔锛堟渶澶у€硷級: 闂�(gu膩n)闁夋檪闁擄紙鏈€澶у€硷級: 宸ヤ綔闆绘簮闆诲:2.7 V to 4.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-16 |
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