參數(shù)資料
型號(hào): DG526
廠商: Intersil Corporation
英文描述: Analog CMOS Latchable Multiplexers
中文描述: 模擬CMOS鎖存多路復(fù)用器
文件頁(yè)數(shù): 11/16頁(yè)
文件大?。?/td> 308K
代理商: DG526
12-11
FIGURE 8A. CHARGE INJECTION WAVEFORMS
FIGURE 8B. CHARGE INJECTION TEST CIRCUIT
Similar connections for DG526, DG527
Test Circuits and Waveforms
(Continued)
3V
EN
0
V
O
V
O
V
O
is the measured voltage error due to charge injection.
The error voltage in Coulombs is Q = C
L
x
V
O
.
EN
A
0
, A
1
, (A
2)
C
L
= 1000pF
+15V
-15V
GND
WR
V-
DG528
DG529
D
V+
RS
V
O
+2.4V
Sx
Typical Performance Curves
FIGURE 9. r
DS(ON)
vs ANALOG SIGNAL VOLTAGE vs SUPPLY
VOLTAGE
FIGURE 10. TYPICAL r
DS(ON)
VARIATION WITH TEMPERATURE
550
500
450
400
350
300
250
200
150
100
50
0
-15
r
D
)
ANALOG SIGNAL VOLTAGE (V)
-13 -11 -9
-7
-5
-3
-1 0 +1 +3 +5 +7 +9 +11+13 +15
I
O
= -200
μ
A
V
EN
= +5V
(A) V+ = +15V, V- = -15V
(B) V+ = +12V, V- = -12V
(C) V+ = +10V, V- = -10V
(D) V+ = +7.5V, V- = -7.5V
(A)
(B)
(C)
(D)
-55
TEMPERATURE (
o
C)
-25
25
45
70
100
125
400
360
320
280
240
200
160
120
80
40
0
r
D
(
)
0
V+ = +15V V- = -15V
V
EN
= 2.4V
I
O
= -200
μ
A
+10V SIGNALS
+10V SIGNALS
DG526, DG527, DG528, DG529
相關(guān)PDF資料
PDF描述
DG526AK Analog CMOS Latchable Multiplexers
DG526BK Analog CMOS Latchable Multiplexers
DG526BY Analog CMOS Latchable Multiplexers
DG526CJ Analog CMOS Latchable Multiplexers
DG526CK Analog CMOS Latchable Multiplexers
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