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參數(shù)資料
| 型號： | DIV100 |
| 英文描述： | DIV100 - DISCONTINUED PRODUCT. No longer recommended for new design. |
| 中文描述： | DIV100 -已停產(chǎn)產(chǎn)品。不再推薦用于新設(shè)計。 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 160K |
| 代理商： | DIV100 |
8
DIV100
FIGURE 5. DIV100 Two-Quadrant Log-Antilog Circuit.
Applying equation (1) to the four logging transistors gives:
For Q
1
:
V
BE
= V
B
– V
E
= V
T
[ n(V
REF
/R
X
– n I
S
]
This leads to:
V
1
= –V
T
[ n(V
REF
/R
X
– n I
S
]
For Q
2
:
V
1
– V
2
= V
T
[ n(V
N
/R
N
) – n I
S
]
For Q
3
:
V
3
= –V
T
[ n (V
D
/R
D
) – n I
S
]
We have now taken the logarithms of the input voltage V
REF
,
V
N
, and V
D
. Applying equation (1) to Q
4
gives:
V
3
– V
2
= V
T
[ n (V
O
/R
O
) – n I
S
].
Assume V
and I
are the same for all four transistors (a
reasonable assumption with a monolithic IC). Solving this
last equation in terms of the previously defined variables and
taking the antilogarithm of the result yields:
V
REF
V
N
R
O
R
D
V
D
R
X
R
N
V
O
=
(2)
In the DIV100 V
= 6.6V, R
O
= R
N
= R
D
, and R
X
is such
that the transfer function is:
V
O
= 10N/D
where: N = Numerator Voltage
D = Denominator Voltage
Figure 5 is a more detailed circuit diagram for the DIV100.
In addition to the circuitry included in Figure 3, it also shows
the resistors (R
, R
, R
, R
, and R
) used for level-shifting.
This converts the DIV100 to a two-quadrant divider.
The implementation of the transfer function in equation (3)
is done using devices with real limitations. For example, the
value of the D input must always be positive. If it isn’t, Q
3
will no longer conduct, A
will become open loop, and its
output and the DIV100 output will saturate. This limitation
is further restricted in that if the D input is less than +250mV
the errors will become substantial. It will still function, but
its accuracy will be less.
(3)
Still another limitation is that the value of the N input must
always be equal to or less than the absolute value of the D
input. From equation (3) it can be seen that if this limitation
is not met, V
will try to be greater than the 10V output
voltage limit of A
4
.
A limitation that may not be obvious is the effect of source
resistance. If the numerator or denominator inputs are driven
from a source with more than 10
of output resistance, the
resultant voltage divider will cause a significant output
error. This voltage divider is formed by the source resistance
and the DIV100 input resistance. With R
SOURCE
= 10
and
R
= 25k
an error of 0.04% results. This means
that the best performance of the DIV100 is obtained by
driving its inputs from operational amplifiers.
Note that the reference voltage is brought out to pins 7 and
8. This gives the user a precision, temperature-compensated
reference for external use. Its open-circuit voltage is
+6.8VDC, typically. Its Thevenin equivalent resistance is
3k
. Since the output resistance is a relatively high value, an
operational amplifier is necessary to buffer this source as
shown in Figure 6. The external amplifier is necessary
because current drawn through the 3k
resistor will effect
the DIV100 scale factor.
FIGURE 6. Buffered Precision Voltage Reference.
OPTION ADJUSTMENTS
Figure 7 shows the connections to make to adjust the
DIV100 for significantly better accuracy over its 40-to-1
denominator range.
A
3
Q
2
Q
3
A
4
A
2
A
1
Q
1
V
Output
+V
CC
Output
V
REF
+
–
R
1
3k
Common
10
D
Input
–V
CC
N
Input
R
11
R
12
(R
O
)
R
13
R
8
R
10
R
g
V
3
R
7
(R
D
)
V
1
(R
N
)
R
6
R
4
R
5
R
3
R
2
(R
X
)
V
2
7
8
9
11
3
13
4
14
6
5
1
12
2
Q
4
DIV100
OPA177
7
8
V
REF
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