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參數(shù)資料
| 型號(hào)： | DJLXTPCD0SE000 |
| 廠商： | Intel Corp. |
| 英文描述： | Advanced 8-Port 10/100 Mbps PHY Transceivers |
| 中文描述： | 先進(jìn)的8端口10/100 Mbps的物理層收發(fā)器 |
| 文件頁(yè)數(shù)： | 155/226頁(yè) |
| 文件大小： | 1575K |
| 代理商： | DJLXTPCD0SE000 |
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LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Datasheet
Document Number: 249241
Revision Number: 007
Revision Date: August 28, 2003
157
4.12
Monitoring Operations
4.12.1
Monitoring Auto-Negotiation
Auto-negotiation may be monitored as follows:
Bits 1.2 and 17.10 = 1 once the link is established.
Additional bits in Register 1 (refer to
Table 84, “Status Register (Address 1)” on page 201
) and
Register 17 (refer to
Table 93, “Quick Status Register (Address 17, Hex 11)” on page 209
) can
be used to determine the link operating conditions and status.
4.12.2
Per-Port LED Driver Functions
The LXT9785/LXT9785E incorporates three direct drive LEDs per port (LED
n
_1, LED
n
_2, and
LED
n
_3).
Note:
The BGA15 package only supports two LEDs per port (LED
n
_1 and LED
n
_2).
On power up, all the LEDs lights up for approximately one second after reset de-asserts. Each LED
may be programmed to one of several different display modes using the LED Configuration
Register. Each per-port LED may be programmed (refer to
Table 96, “LED Configuration Register
(Address 20, Hex 14)” on page 213
) to indicate one of the following conditions:
Operating Speed
Transmit Activity
Receive Activity
Collision Condition
Link Status
Duplex Mode
Isolate Condition
The LEDs can also be programmed to display various combined status conditions. For example,
setting bits 20.15:12 = 1101 produces the following combination of Link and Activity indications:
If Link is down, LED is off.
If Link is up, LED is on.
If Link is up AND activity is detected, the LED blinks at the stretch interval selected by bits
20.3:2 and continues to blink as long as activity is present.
The LED driver pins are open drain circuits (10mA max current rating). Refer to
“LED Circuit” on
page 167
under the Application Information Section for LED circuit design details. The LED
Configuration Register also provides optional LED pulse stretching to 30, 60, or 100 ms. If during
this pulse stretch period, the event occurs again, the pulse stretch time is further extended (see
Table 96, “LED Configuration Register (Address 20, Hex 14)” on page 213
).
When an event such as receiving a packet occurs, it is edge detected and starts the stretch timer.
The LED driver remains asserted until the stretch timer expires. If another event occurs before the
stretch timer expires, the stretch timer is reset and the stretch time extended.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DJLXTPCD0SE001 | Advanced 8-Port 10/100 Mbps PHY Transceivers |
| DJLXTPED0QE000 | Advanced 8-Port 10/100 Mbps PHY Transceivers |
| DJLXTPED0QE001 | Advanced 8-Port 10/100 Mbps PHY Transceivers |
| DJLXTPED0SE000 | Advanced 8-Port 10/100 Mbps PHY Transceivers |
| DJLXTPED0SE001 | Advanced 8-Port 10/100 Mbps PHY Transceivers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DJLXTPCD0SE001 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Advanced 8-Port 10/100 Mbps PHY Transceivers |
| DJLXTPED0QE000 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Advanced 8-Port 10/100 Mbps PHY Transceivers |
| DJLXTPED0QE001 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Advanced 8-Port 10/100 Mbps PHY Transceivers |
| DJLXTPED0SE000 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Advanced 8-Port 10/100 Mbps PHY Transceivers |
| DJLXTPED0SE001 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Advanced 8-Port 10/100 Mbps PHY Transceivers |
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