Contents
6
Datasheet
Document Number: 249241
Revision Number: 007
Revision Date: August 28, 2003
5.2.5
5.2.6
Typical Application Circuits...............................................................................................168
The Fiber Interface ..............................................................................................166
LED Circuit...........................................................................................................167
5.3
6.0
Test Specifications
....................................................................................................................173
7.0
Register Definitions
...................................................................................................................199
8.0
Package Specifications
.............................................................................................................221
9.0
Ordering Information
.................................................................................................................227
Figures
1
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4
5
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31
32
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34
35
36
37
38
Intel
LXT9785/LXT9785E Block Diagram.................................................................................19
Intel
LXT9785 and Intel
LXT9785E RMII 208-Pin PQFP Assignments ..................................21
Intel
LXT9785/LXT9785E SMII 208-Pin PQFP Assignments...................................................26
Intel
LXT9785/LXT9785E SS-SMII 208-Pin PQFP Assignments.............................................31
Intel LXT9785/LXT9785E 241-Ball BGA23 Assignments (Top View)......................................51
Intel
LXT9785MBC 196-Ball BGA15 Assignments (Top View) ................................................98
Intel
LXT9785/LXT9785E Interfaces ......................................................................................118
Intel
LXT9785/LXT9785E Internal Loopback..........................................................................120
Intel
LXT9785/LXT9785E Management Interface Read Frame Structure..............................122
Intel
LXT9785/LXT9785E Management Interface Write Frame Structure..............................122
Intel
LXT9785/LXT9785E Port Address Scheme ...................................................................123
Intel
LXT9785/LXT9785E Interrupt Logic ...............................................................................124
Intel
LXT9785/LXT9785E Initialization Sequence ..................................................................127
Intel
LXT9785/LXT9785E Auto-Negotiation Operation...........................................................131
Intel
LXT9785/LXT9785E Typical SMII Interface Diagram.....................................................133
Intel
LXT9785/LXT9785E Typical SMII Quad Sectionalization Diagram................................134
Intel
LXT9785/LXT9785E 100 Mbps Serial MII Data Flow.....................................................135
Intel
LXT9785/LXT9785E Serial MII Transmit Synchronization .............................................136
Intel
LXT9785/LXT9785E Serial MII Receive Synchronization ..............................................137
Intel
LXT9785/LXT9785E Typical SS-SMII Interface Diagram...............................................139
Intel
LXT9785/LXT9785E Typical SS-SMII Quad Sectionalization Diagram..........................140
Intel
LXT9785/LXT9785E SS-SMII Transmit Timing..............................................................141
Intel
LXT9785/LXT9785E SS-SMII Receive Timing...............................................................141
Intel
LXT9785/LXT9785E RMII Data Flow .............................................................................142
Intel
LXT9785/LXT9785E Typical RMII Interface Diagram.....................................................143
Intel
LXT9785/LXT9785E Typical RMII Quad Sectionalization Diagram................................144
Intel
LXT9785/LXT9785E 100BASE-X Frame Format ...........................................................145
Intel
LXT9785/LXT9785E Protocol Sublayers........................................................................146
Typical IP Telephone System Connection................................................................................152
Intel
LXT9785E Negotiation Flow Chart .................................................................................156
Intel
LXT9785/LXT9785E LED Pulse Stretching....................................................................158
Intel
LXT9785/LXT9785E RMII Programmable Out-of-Band Signaling..................................158
LED Circuit ...............................................................................................................................167
Intel
LXT9785/LXT9785E Power and Ground Supply Connections.......................................168
Intel
LXT9785/LXT9785E Typical Twisted-Pair Interface.......................................................169
Recommended Intel
LXT9785/LXT9785E-to-3.3 V Fiber Transceiver Interface Circuitry......170
Recommended Intel
LXT9785/LXT9785E-to-5 V Fiber Transceiver Interface Circuitry.........171
ON Semiconductor Triple PECL-to-LVPECL Translator ..........................................................172