參數(shù)資料
型號(hào): DLP-USB1
廠商: Electronic Theatre Controls, Inc.
英文描述: USB to FIFO Parallel Interface Module
中文描述: USB轉(zhuǎn)先進(jìn)先出并行接口模塊
文件頁(yè)數(shù): 3/6頁(yè)
文件大小: 67K
代理商: DLP-USB1
Revision 1.4
- 3 -
Table 1 - DLP-USB1 PINOUT DESCRIPTION
1
1
Pin # Signal Type Description
Pin#
1
2
3
Description
EXTRST#
(IN)
Take low to reset the entire device
SLEEP#
(Out) Goes low when module enters the suspend mode
TXE#
(Out)
When high, the FIFO’s 384-byte transmit buffer is full or busy storing the last
byte written. Do not attempt to write data to the transmit buffer when TXE# is high.
RXF#
(Out)
When low, at least 1 byte is present in the FIFO’s 128-byte receive buffer and is
ready to be read with RD#. RXF# goes high when the receive buffer is empty.
WR
(In)
When taken from a high to a low state, WR reads the 8 data lines and writes the
byte into the FIFO’s transmit buffer. Data written to the transmit buffer is immediately
sent to the host PC and placed in the RS-232 buffer opened by the application program.
RD#
(In)
When pulled low, RD# takes the 8 data lines from a high impedance state to the
current byte in the FIFO's receive buffer. Taking RD# high returns the data pins to a high
impedance state and prepares the next byte (if available) in the FIFO to be read.
VCC
Provides power for target electronics. Up to 500mA available when USB is active.
GND
Ground Supply Pin for target electronics.
4
5
6
7
8
16
15
14
13
12
11
10
9
D0 I/O Bi-directional Data Bus Bit # 0
D1 I/O Bi-directional Data Bus Bit # 1
D2 I/O Bi-directional Data Bus Bit # 2
D3 I/O Bi-directional Data Bus Bit # 3
D4 I/O Bi-directional Data Bus Bit # 4
D5 I/O Bi-directional Data Bus Bit # 5
D6 I/O Bi-directional Data Bus Bit # 6
D7 I/O Bi-directional Data Bus Bit # 7
6
7
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