www.fairchildsemi.com
2
D
Operating Rules
1. To use the internal 2 k
timing resistor, connect the
R
INT
pin to V
CC
.
2. An external resistor (R
X
) or the internal resistor (2 k
)
and an external capacitor (C
X
) are required for proper
operation. The value of C
X
may vary from 0 to any nec-
essary value. For small time constants use high-quality
mica, glass, polypropylene, polycarbonate, or polysty-
rene capacitors. For large time constants use solid tan-
talum or special aluminum capacitors. If the timing
capacitors have leakages approaching 100 nA or if
stray capacitance from either terminal to ground is
greater than 50 pF the timing equations may not repre-
sent the pulse width the device generates.
3. The pulse width is essentially determined by external
timing components R
X
and C
X
. For C
X
<
1000 pF see
Figure 1 design curves on t
W
as function of timing com-
ponents value. For C
X
>
1000 pF the output is defined
as:
t
W
=
K R
X
C
X
where [R
X
is in Kilo-ohm]
[C
X
is in pico Farad]
[t
W
is in nano second]
[K
≈
0.7]
4. If C
X
is an electrolytic capacitor a switching diode is
often required for standard TTL one-shots to prevent
high inverse leakage current Figure 2.
5. Output pulse width versus V
CC
and operation tempera-
tures: Figure 3 depicts the relationship between pulse
width variation versus V
CC.
Figure 4 depicts pulse
width variation versus ambient temperature.
6. The “K” coefficient is not a constant, but varies as a
function of the timing capacitor C
X
. Figure 5 details this
characteristic.
7. Under any operating condition C
X
and R
X
must be kept
as close to the one-shot device pins as possible to min-
imize stray capacitance, to reduce noise pick-up, and
to reduce I X R and Ldi/dt voltage developed along
their connecting paths. If the lead length from C
X
to
pins (10) and (11) is greater than 3 cm, for example,
the output pulse width might be quite different from val-
ues predicted from the appropriate equations. A non-
inductive and low capacitive path is necessary to
ensure complete discharge of C
X
in each cycle of its
operation so that the output pulse width will be accu-
rate.
8. V
CC
and ground wiring should conform to good high-
frequency standards and practices so that switching
transients on the V
CC
and ground return leads do not
cause interaction between one-shots. A 0.01
μ
F to 0.10
μ
F bypass capacitor (disk ceramic or monolithic type)
from V
CC
to ground is necessary on each device. Fur-
thermore, the bypass capacitor should be located as
close to the V
CC
-pin as space permits.
For further detailed device characteristics and output per-
formance please refer to the one-shot application note, AN-
366.
FIGURE 1.
FIGURE 2.
FIGURE 3.
FIGURE 4.
FIGURE 5.