參數(shù)資料
型號(hào): DM7476N
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Dual Master-Slave J-K Flip-Flops with Clear, Preset, and Complementary Outputs
中文描述: TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
封裝: 0.300 INCH, PLASTIC, MS-001, DIP-16
文件頁數(shù): 2/4頁
文件大?。?/td> 41K
代理商: DM7476N
www.fairchildsemi.com
2
D
Absolute Maximum Ratings
(Note 2)
Note 2:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 3:
T
A
=
25
°
C and V
CC
=
5V.
Note 4:
The symbol (
,
) indicates the edge of the clock pulse is used for reference (
) for rising edge, (
) for falling edge.
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 5:
All typicals are at V
CC
=
5V, T
A
=
25
°
C.
Note 6:
Clear is measured with preset HIGH and preset is measured with clear HIGH.
Note 7:
Not more than one output should be shorted at a time.
Note 8:
With all outputs OPEN, I
CC
is measured with the Q and Q outputs HIGH in turn. At the time of measurement the clock input is grounded.
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
5.5V
0
°
C to
+
70
°
C
65
°
C to
+
150
°
C
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
f
CLK
t
W
Parameter
Min
4.75
2
Nom
5
Max
5.25
Units
V
V
V
mA
mA
MHz
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 3)
Pulse Width
(Note 3)
0.8
0.4
16
15
0
Clock HIGH
Clock LOW
Preset LOW
Clear LOW
20
47
25
25
0
0
0
ns
t
SU
t
H
T
A
Input Setup Time (Note 3)(Note 4)
Input Hold Time (Note 3)(Note 4)
Free Air Operating Temperature
ns
ns
°
C
70
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 5)
V
I
V
OH
Input Clamp Voltage
HIGH Level
Output Voltage
V
CC
=
Min, I
I
=
12 mA
V
CC
=
Min, I
OH
=
Max
V
IL
=
Max, V
IH
=
Min
V
CC
=
Min, I
OL
=
Max
V
IH
=
Min, V
IL
=
Max
1.5
V
2.4
3.4
V
V
OL
LOW Level
Output Voltage
Input Current @ Max Input Voltage V
CC
=
Max, V
I
=
5.5V
HIGH Level
Input Current
0.2
0.4
V
I
I
I
IH
1
mA
V
CC
=
Max
V
I
=
2.4V
J, K
Clock
Clear
40
80
80
μ
A
Preset
J, K
Clock
80
1.6
3.2
3.2
3.2
55
34
I
IL
LOW Level
Input Current
V
CC
=
Max
V
I
=
0.4V
(Note 6)
mA
Clear
Preset
I
OS
I
CC
Short Circuit Output Current
V
CC
=
Max (Note 7)
V
CC
=
Max (Note 8)
18
mA
Supply Current
18
mA
相關(guān)PDF資料
PDF描述
DM7486 Quad 2-Input Exclusive-OR Gate(四2輸入異或門)
DM7486N Quad 2-Input Exclusive-OR Gate
DM7490A Decade and Binary Counters(十進(jìn)制和二進(jìn)制計(jì)數(shù)器)
DM7490AN Decade and Binary Counters
DM74ALS00 Quad 2-Input NAND Gate
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DM7476N/A+ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:J-K-Type Flip-Flop
DM7476N/B+ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:J-K-Type Flip-Flop
DM7476W 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual Master-Slave J-K Flip-Flops with Clear, Preset, and Complementary Outputs
DM7483J/A+ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Binary Adder
DM7483N/A+ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Binary Adder