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參數(shù)資料
| 型號： | DM74AS373N |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Octal D-Type Transparent Latch with 3-STATE Outputs |
| 中文描述： | AS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, DIP-20 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 58K |
| 代理商： | DM74AS373N |
2000 Fairchild Semiconductor Corporation
DS006309
www.fairchildsemi.com
April 1984
Revised March 2000
D
DM74AS373
Octal D-Type Transparent Latch with 3-STATE Outputs
General Description
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high-logic-level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components. They are particularly attractive
for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight latches of the DM74AS373 are transparent D-
type latches, meaning that while the enable (G) is HIGH
the Q outputs will follow the data (D) inputs. When the
enable is taken LOW the output will be latched at the level
of the data that was set up.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the latches. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
Features
I
Switching specifications at 50 pF
I
Switching specifications guaranteed over full tempera-
ture and V
CC
range
I
Advanced oxide-isolated, ion-implanted Schottky TTL
process
I
Functionally and pin for pin compatible with LS and ALS
TTL counterparts
I
Improved AC performance over LS and ALS TTL coun-
terparts
I
3-STATE buffer-type outputs drive bus lines directly
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
DM74AS373WM
DM74AS373N
Package Number
M20B
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM74AS373WM | Octal D-Type Transparent Latch with 3-STATE Outputs |
| DM74AS373 | Octal D-Type Transparent Latch with 3-STATE Outputs |
| DM74AS373WMX | 8-Bit D-Type Latch |
| DM74AS374 | Octal D-Type Edge-Triggered Flip-Flops |
| DM74AS374N | Octal D-Type Edge-Triggered Flip-Flops |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM74AS373N_Q | 功能描述:閉鎖 Oct D-Type Trans Lat RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| DM74AS373WM | 功能描述:閉鎖 Oct D-Type Trans Lat RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| DM74AS373WMX | 功能描述:閉鎖 Oct D-Type Trans Lat RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| DM74AS374N | 功能描述:觸發(fā)器 Oct D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| DM74AS374N_Q | 功能描述:觸發(fā)器 Oct D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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