參數(shù)資料
型號: DM74KS112AM
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
中文描述: LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
封裝: 0.150 INCH, MS-012, SOIC-16
文件頁數(shù): 4/5頁
文件大?。?/td> 52K
代理商: DM74KS112AM
www.fairchildsemi.com
4
D
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
相關(guān)PDF資料
PDF描述
DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs(雙負(fù)邊緣觸發(fā)的J-K觸發(fā)器(帶預(yù)置、清除端、互補(bǔ)輸出))
DM74LS112AN Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
DM74LS11M Triple 3-Input AND Gate
DM74LS11 Triple 3-Input AND Gate(三3輸入與門)
DM74LS11N Triple 3-Input AND Gate
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