參數(shù)資料
型號(hào): DM74LS10N
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Triple 3-Input NAND Gate
中文描述: LS SERIES, TRIPLE 3-INPUT NAND GATE, PDIP14
封裝: 0.300 INCH, PLASTIC, MS-001, DIP-14
文件頁(yè)數(shù): 1/4頁(yè)
文件大?。?/td> 46K
代理商: DM74LS10N
2000 Fairchild Semiconductor Corporation
DS006349
www.fairchildsemi.com
August 1986
Revised March 2000
D
DM74LS10
Triple 3-Input NAND Gate
General Description
This device contains three independent gates each of
which performs the logic NAND function.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Y
=
ABC
H
=
HIGH Logic Level
L
=
LOW Logic Level
X
=
Either LOW or HIGH Logic Level
Order Number
DM74LS10M
DM74LS10N
Package Number
M14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
B
X
L
X
H
Output
Y
H
H
H
L
A
X
X
L
H
C
L
X
X
H
相關(guān)PDF資料
PDF描述
DM74LS10MX Triple 3-input NAND Gate
DM74LS112AMX J-K-Type Flip-Flop
DM74KS112AM Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs(雙負(fù)邊緣觸發(fā)的J-K觸發(fā)器(帶預(yù)置、清除端、互補(bǔ)輸出))
DM74LS112AN Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
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DM74LS112AM 功能描述:觸發(fā)器 Dl M-S J-K Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
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