- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376787 > DM74LS112AMX (FAIRCHILD SEMICONDUCTOR CORP) J-K-Type Flip-Flop PDF資料下載
參數(shù)資料
| 型號： | DM74LS112AMX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | J-K-Type Flip-Flop |
| 中文描述： | LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SOP-16 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 52K |
| 代理商： | DM74LS112AMX |
www.fairchildsemi.com
2
D
Absolute Maximum Ratings
(Note 2)
Note 2:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 3:
C
L
=
15 pF, R
L
=
2 k
, T
A
=
25
°
C and V
CC
=
5V.
Note 4:
The symbol (
↓
) indicates the falling edge of the clock pulse is used for reference.
Note 5:
C
L
=
50 pF, R
L
=
2 k
, T
A
=
25
°
C and V
CC
=
5V.
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
7V
0
°
C to
+
70
°
C
65
°
C to
+
150
°
C
Symbol
Parameter
Min
4.75
2
Nom
5
Max
5.25
Units
V
V
V
mA
mA
MHz
MHz
V
CC
V
IH
V
IL
I
OH
I
OL
f
CLK
f
CLK
t
W
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 3)
Clock Frequency (Note 5)
Pulse Width
(Note 3)
0.8
0.4
8
30
25
0
0
Clock HIGH
Preset LOW
Clear LOW
Clock HIGH
Preset LOW
Clear LOW
20
25
25
25
30
30
20
↓
25
↓
0
↓
5
↓
0
ns
t
W
Pulse Width
(Note 5)
ns
t
SU
t
SU
t
H
t
H
T
A
Setup Time (Note 3)(Note 4)
Setup Time (Note 4)(Note 5)
Hold Time (Note 3)(Note 4)
Hold Time (Note 4)(Note 5)
Free Air Operating Temperature
ns
ns
ns
ns
°
C
70
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM74KS112AM | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs |
| DM74LS112A | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs(雙負(fù)邊緣觸發(fā)的J-K觸發(fā)器（帶預(yù)置、清除端、互補(bǔ)輸出）) |
| DM74LS112AN | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs |
| DM74LS11M | Triple 3-Input AND Gate |
| DM74LS11 | Triple 3-Input AND Gate(三3輸入與門) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM74LS112AN | 功能描述:觸發(fā)器 Dl M-S J-K Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| DM74LS11M | 功能描述:邏輯門 Trp 3-Input AND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| DM74LS11MX | 功能描述:邏輯門 Trp 3-Input AND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| DM74LS11N | 功能描述:邏輯門 Trp 3-Input AND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| DM74LS11NNSC84 | 制造商:National Semiconductor 功能描述:74LS11N NSC'88 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。