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參數(shù)資料
| 型號： | DM74LS533N |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Octal Transparent Latch with 3-STATE Outputs |
| 中文描述： | LS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, DIP-20 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 48K |
| 代理商： | DM74LS533N |
2000 Fairchild Semiconductor Corporation
DS009811
www.fairchildsemi.com
October 1988
Revised March 2000
D
DM74LS533
Octal Transparent Latch with 3-STATE Outputs
General Description
The DM74LS533 consists of eight latches with 3-STATE
outputs for bus organized system applications. The flip-
flops appear transparent to the data when Latch Enable
(LE) is HIGH. When LE is LOW, the data that meets the
setup times is latched. Data appears on the bus when the
Output Enable (OE) is LOW. When OE is HIGH the bus
output is in the high impedance state. The DM74LS533 is
the same as the DM74LS373, except that the outputs are
inverted. For detailed specifications please see the
DM74LS373 data sheet, but note that the propagation
delays from data to output are 5.0 ns longer for the
DM74LS533 than for the DM74LS373.
Features
I
Eight latches in a single package
I
3-STATE outputs for bus interfacing
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
V
CC
=
Pin 20
GND
=
Pin 10
Pin Descriptions
Connection Diagram
Function Table
L
=
LOW State
H
=
HIGH State
X
=
Don't Care
Z
=
High Impedance State
Q
O
=
Previous Condition of O
Order Number
DM74LS533WM
DM74LS533N
Package Number
M20B
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names
D0, D7
LE
OE
O
0–O7
Description
Data Inputs
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
Complementary 3-STATE Outputs
OUTPUT
Latch
D
Output
Enable
L
L
L
H
Enable
H
H
L
X
O
L
H
Q
O
Z
H
L
X
X
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM74LS533 | Octal Transparent Latch with 3-STATE Outputs |
| DM74LS533WMX | 8-Bit D-Type Latch |
| DM74LS533WM | Octal Transparent Latch with 3-STATE Outputs |
| DM74LS534 | Octal D-Type Flip-Flop with 3-STATE Outputs |
| DM74LS534N | Octal D-Type Flip-Flop with 3-STATE Outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM74LS533WM | 功能描述:閉鎖 DISC BY MFG 7/03 RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| DM74LS533WMX | 功能描述:閉鎖 Octal Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| DM74LS534N | 功能描述:觸發(fā)器 Oct D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| DM74LS540WM | 制造商:Texas Instruments 功能描述: |
| DM74LS54N | 制造商:Texas Instruments 功能描述: |
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