參數(shù)資料
型號(hào): DM74LS670M
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 3-STATE 4-by-4 Register File
中文描述: 4 X 4 STANDARD SRAM, 55 ns, PDSO16
封裝: 0.150 INCH, MS-012, SOIC-16
文件頁數(shù): 4/6頁
文件大小: 65K
代理商: DM74LS670M
www.fairchildsemi.com
4
D
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 8:
All typicals are at V
CC
=
5V, T
A
=
25
°
C.
Note 9:
Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 10:
I
CC
is measured with 4.5V applied to all DATA inputs and both ENABLE inputs, all ADDRESS inputs are grounded and all outputs are OPEN.
Switching Characteristics
at V
CC
=
5V and T
A
=
25
°
C
Note 11:
C
L
=
5 pF.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 8)
V
I
V
OH
Input Clamp Voltage
HIGH Level
Output Voltage
V
CC
=
Min, I
I
=
18 mA
V
CC
=
Min, I
OH
=
Max
V
IL
=
Max, V
IH
=
Min
V
CC
=
Min, I
OL
=
Max
I
OL
=
Max, V
IH
=
Min
V
CC
=
Max
V
I
=
7V
1.5
V
2.4
3.4
V
V
OL
LOW Level
Output Voltage
Input Current @ Max
0.34
0.5
V
I
I
D, R or W
0.1
Input Voltage
G
W
G
R
D, R or W
0.2
0.3
20
mA
I
IH
HIGH Level
V
CC
=
Max
V
I
=
2.7V
Input Current
G
W
G
R
D, R or W
40
60
0.4
0.8
1.2
μ
A
I
IL
LOW Level
V
CC
=
Max
V
I
=
0.4V
Input Current
G
W
G
R
mA
I
OZH
Off-State Output Current with
HIGH Level Output Voltage Applied V
IH
=
Min, V
IL
=
Max
Off-State Output Current with
LOW Level Output Voltage Applied V
IH
=
Min, V
IL
=
Max
Short Circuit Output Current
Supply Current
V
CC
=
Max, V
O
=
2.7V
20
μ
A
I
OZL
V
CC
=
Max, V
O
=
0.4V
20
μ
A
I
OS
I
CC
V
CC
=
Max (Note 9)
V
CC
=
Max (Note 10)
20
100
50
mA
mA
30
R
L
=
667
Symbol
Parameter
From (Input)
C
L
=
45 pF
Min
C
L
=
150 pF
Min
Units
To (Output)
Max
Max
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
Read Select to Q
40
50
ns
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
Read Select to Q
45
55
ns
t
PLH
Write Enable to Q
45
55
ns
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
t
PHL
Write Enable to Q
50
60
ns
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
Data to Q
45
55
ns
t
PHL
Data to Q
40
50
ns
HIGH-to-LOW Level Output
Output Enable Time
to HIGH Level Output
t
PZH
Read Enable to Any Q
35
45
ns
t
PZL
Output Enable Time
to LOW Level Output
Output Disable Time from
Read Enable to Any Q
40
50
ns
t
PHZ
Read Enable to Any Q
50
ns
HIGH Level Output (Note 11)
Output Disable Time from
LOW Level Output (Note 11)
t
PLZ
Read Enable to Any Q
35
ns
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