參數(shù)資料
型號(hào): DM9000AEP
廠商: Electronic Theatre Controls, Inc.
英文描述: Ethernet Controller with General Processor Interface
中文描述: 以太網(wǎng)控制器與通用處理器接口
文件頁數(shù): 17/56頁
文件大?。?/td> 1744K
代理商: DM9000AEP
DM9000A
Ethernet Controller with General Processor Interface
6.8 Receive Overflow Counter Register ( 07H )
Bit
Name
Default
Receive Overflow Counter Overflow
This bit is set when the ROC has an overflow condition
Receive Overflow Counter
This is a statistic counter to indicate the received packet count upon FIFO overflow
6.9 Back Pressure Threshold Register (08H)
Bit
Name
Default
Back Pressure High Water Overflow Threshold. MAC will generate the jam pattern
when RX SRAM free space is lower than this threshold value
The default is 3K-byte free space. Please do not exceed SRAM size
(1 unit=1K bytes)
Jam Pattern Time. Default is 200us
bit3 bit2 bit1 bit0 time
0 0 0 0 5us
0 0 0 1 10us
0 0 1 0 15us
0 0 1 1 25us
0 1 0 0 50us
0 1 0 1 100us
0 1 1 0 150us
0 1 1 1 200us
1 0 0 0 250us
1 0 0 1 300us
1 0 1 0 350us
1 0 1 1 400us
1 1 0 0 450us
1 1 0 1 500us
1 1 1 0 550us
1 1 1 1 600us
6.10 Flow Control Threshold Register ( 09H )
Bit
Name
Default
RX FIFO High Water Overflow Threshold
Send a pause packet with pause_ time=FFFFH when the RX RAM free space is
less than this value., If this value is zero, its means no free RX SRAM space. The
default value is 3K-byte free space. Please do not exceed SRAM size (1 unit=1K
bytes)
RX FIFO Low Water Overflow Threshold
Send a pause packet with pause_time=0000 when RX SRAM free space is larger
than this value. This pause packet is enabled after the high water pause packet is
transmitted. The default SRAM free space is 8K-byte. Please do not exceed SRAM
size
(1 unit=1K bytes)
Preliminary datasheet
Version: DM9000A-DS-P03
Apr. 21, 2005
17
Description
7
RXFU
PHS0,R/C
6:0
ROC
PHS0,R/C
Description
7:4
BPHW
PHS3,
RW
3:0
JPT
PHS7,
RW
Description
7:4
HWOT
PHS3,
RW
3:0
LWOT
PHS8,
RW
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