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參數(shù)資料
| 型號： | DPS256X16BY3-25I |
| 英文描述： | x16 SRAM Module |
| 中文描述： | x16的SRAM模塊 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大小： | 839K |
| 代理商： | DPS256X16BY3-25I |
DPS256X16Cn3/DPS256X16Bn3
Dense-Pac Microsystems, Inc.
AC OPERATING CONDITIONS AND CHARACTERISTICS - WRITE CYCLE 6, 7:
Over operating ranges
No. Symbol
Parameter
20ns*
25ns
30ns
35ns
45ns
Unit
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
13
tWC
Write Cycle Time
20
25
30
35
45
ns
14
tAW
Address Valid to End of Write
15
20
25
30
40
ns
15
tCW
Chip Enable to End of Write
15
20
25
30
40
ns
16
tAS
Address Set-Up Time **
0
ns
17
tWP
Write Pulse Width
15
20
25
30
35
ns
18
tWR
Write Recovery Time
0
ns
19
tWHZ
Write Enable to Output in HIGH-Z 4, 5
8
10
12
15
20
ns
20
tDW
Data to Write Time Overlap
12
15
20
25
ns
21
tDH
Data Hold from Write Time
0
ns
22
tOW
Output Active from End of Write
3
ns
* Available in Commercial Only.
** Valid for both Read and Write Cycles.
WRITE CYCLE 1: CE Controlled. 8
ADDRESS
CE
WE
DATA IN
DATA OUT
NOTES:
1. All voltages are with respect to VSS.
2. -2.0V min. for pulse width less than 20ns (VIL min. = -0.5V at
DC level).
3. Stresses greater than those under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
4. This parameter is guaranteed and not 100% tested.
5. Transition is measured at the point of
±500mV from steady state
voltage.
6. When OE and CE are LOW and WE is HIGH, I/O pins are in
the output state,and input signals of opposite phase to the
outputs must not be applied.
7. The outputs are in a high impedance state when WE is LOW.
8. SEL timing is the same as CE timing (Valid for DPS256X16Cn3
only). The Waveform is inverted.
9. Chip Enable and Write Enable can initiate and terminate
WRITE Cycle.
30A097-34
REV. G
6
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相關PDF資料 |
PDF描述 |
|---|---|
| DPS256X16BY3-25M | x16 SRAM Module |
| DPS256X16BY3-30B | x16 SRAM Module |
| DPS256X16BY3-30C | x16 SRAM Module |
| DPS256X16BY3-30I | x16 SRAM Module |
| DPS256X16BY3-30M | x16 SRAM Module |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DPS256X16BY3-25M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SRAM Module |
| DPS256X16BY3-30B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SRAM Module |
| DPS256X16BY3-30C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SRAM Module |
| DPS256X16BY3-30I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SRAM Module |
| DPS256X16BY3-30M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SRAM Module |
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