參數(shù)資料
型號： DRM013
英文描述： USB Security Key Reference Design Designer Reference Manual
中文描述： 安全密鑰的USB參考設計設計參考手冊
文件頁數(shù)： 63/72頁
文件大?。?/td> 1177K
代理商： DRM013
Glossary
DRM010 — Rev 0
Designer Reference Manual
MOTOROLA
Glossary
63
comparator
— A device that compares the magnitude of two inputs. A digital comparator defines
the equality or relative differences between two binary numbers.
computer operating properly module (COP)
— A counter module that resets the MCU if
allowed to overflow.
condition code register (CCR)
— An 8-bit register in the CPU that contains the interrupt mask
bit and five bits that indicate the results of the instruction just executed.
control bit
— One bit of a register manipulated by software to control the operation of the
module.
control unit
— One of two major units of the CPU. The control unit contains logic functions that
synchronize the machine and direct various operations. The control unit decodes
instructions and generates the internal control signals that perform the requested
operations. The outputs of the control unit drive the execution unit, which contains the
arithmetic logic unit (ALU), CPU registers, and bus interface.
COP
— See "computer operating properly module (COP)."
CPU
— See “central processor unit (CPU).”
CPU12
— The CPU of the MC68HC12 Family.
CPU clock
— Bus clock select bits BCSP and BCSS in the clock select register (CLKSEL)
determine which clock drives SYSCLK for the main system, including the CPU and buses.
When EXTALi drives the SYSCLK, the CPU or bus clock frequency (f
o
) is equal to the
EXTALi frequency divided by 2.
CPU cycles
— A CPU cycle is one period of the internal bus clock, normally derived by dividing
a crystal oscillator source by two or more so the high and low times will be equal. The
length of time required to execute an instruction is measured in CPU clock cycles.
CPU registers
— Memory locations that are wired directly into the CPU logic instead of being
part of the addressable memory map. The CPU always has direct access to the
information in these registers. The CPU registers in an M68HC12 are:
A (8-bit accumulator)
B (8-bit accumulator)
–
D (16-bit accumulator formed by concatenation of
accumulators A and B)
IX (16-bit index register)
IY (16-bit index register)
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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