參數(shù)資料
型號: DS1021S-50/T&R
廠商: Maxim Integrated Products
文件頁數(shù): 1/9頁
文件大?。?/td> 0K
描述: IC DELAY LINE 256TAP 16-SOIC
標(biāo)準(zhǔn)包裝: 1,000
標(biāo)片/步級數(shù): 256
功能: 可編程
延遲到第一抽頭: 10ns
接頭增量: 0.5ns
可用的總延遲: 137.5ns
獨(dú)立延遲數(shù): 1
電源電壓: 4.75 V ~ 5.25 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 帶卷 (TR)
1 of 9
111799
FEATURES
All-silicon time delay
Models with 0.25 ns and 0.5 ns steps
Programmable using 3-wire serial port or 8-
bit parallel port
Leading and trailing edge accuracy
Economical
Auto-insertable, low profile, 16-pin SOIC
package
Low-power CMOS
TTL/CMOS-compatible
Vapor phase, IR and wave solderable
PIN ASSIGNMENT
PIN DESCRIPTION
IN
- Delay Input
P0-P7
- Parallel Program Pins
GND
- Ground
OUT
- Delay Output
VCC
- +5 Volts
S
- Mode Select
E- Enable
C
- Serial Port Clock
Q
- Serial Data Output
D
- Serial Data Input
DESCRIPTION
The DS1021 Programmable 8-Bit Silicon Delay Line consists of an 8-bit, user-programmable CMOS
silicon integrated circuit. Delay values, programmed using either the 3-wire serial port or the 8-bit
parallel port, can be varied over 256 equal steps. The faster model (-25) offers a maximum delay of 73.75
ns with an incremental delay of 0.25 ns, while the slower model (-50) has a maximum delay of 137.5 ns
with an incremental delay of 0.5 ns. Both models have an inherent (step zero) delay of 10 ns. After the
user-determined delay, the input logic state is reproduced at the output without inversion. The DS1021 is
TTL- and CMOS-compatible, capable of driving 10 74LS-type loads, and features both rising and falling
edge accuracy.
The all-CMOS DS1021 integrated circuit has been designed as a reliable, economic alternative to hybrid
programmable delay lines. It is offered in a space-saving surface mount 16-pin SOIC.
DS1021
Programmable 8-Bit
Silicon Delay Line
www.dalsemi.com
DS1021S 16-Pin SOIC (300-mil)
See Mech. Drawings Section
IN
E
Q/PO
P1
P3
P2
GND
OUT
P6
P5
D
C
P7
VCC
1
2
3
4
5
6
7
16
15
14
13
12
8
9
10
11
P4
S
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