參數(shù)資料
型號: DS1065T-60
英文描述: IC-OSC/DIVIDER
中文描述: IC-OSC/DIVIDER
文件頁數(shù): 3/10頁
文件大小: 207K
代理商: DS1065T-60
DS1065
3 of 10
PIN DESCRIPTIONS
Input/Output Pin (IN/OUT):
This pin is the main oscillator output, with a frequency determined by
clock reference, M and N dividers. Except in programming mode this pin is always an output and will be
referred to as “OUT”. In programming mode this pin will be referred to as “IN”.
USER-PROGRAMMABLE REGISTERS
The following registers can be programmed by the user to determine device operating frequency and
mode of operation. Details of how these registers are programmed can be found in a later section; in this
section the function of the registers are described. The register settings are nonvolatile, the values being
stored automatically in EEPROM when the registers are programmed.
NOTE: The register bits cannot be used to make frequency changes on the fly. Changes can only be
made by powering the device up in “Programming” mode. For them to be become effective the device
must then be powered down and powered up again in “Operation” mode.
For programming purposes the register bits are divided into two 9-bit words; the “MUX” word
determines mode prescaler values and the “DIV” word sets the value of the programmable divider.
MUX WORD
Figure 2
(MSB)
0*
(LSB)
0*
0*
1*
1*
M
MSEL
DIV1
0*
*These bits must be set to the indicated values
DIV1
This bit allows the master clock to be routed directly to the output (DIV1=1). The N programmable
divider is bypassed so the programmed value of N is ignored. The frequency of the output (f
OUT
) will be
INTCLK or EXTCLK depending on which reference has been selected. If the Internal clock is selected
the M prescaler is also bypassed (the bit values of MSEL and M are ignored), so in this case f
OUT
=
INTOSC (which also equals MCLK and INTCLK). If DIV1=0 the prescaler and programmable divider
function normally.
MSEL
This bit determines whether or not the M prescaler is bypassed.
MSEL
=1 will bypass the prescaler.
MSEL
=0 will switch in the prescaler (unless overridden by DIV1=1), with a divide-by number
determined by the M bit.
M
This bit sets the divide-by number for the prescaler. M = 0 results in divide-by-4, M=1 results in divide-
by-2. The setting of this bit is irrelevant if either DIV1=1 or
MSEL
=1.
Table 2
DIV1
BIT
MSEL
BIT
0
0
1
M
BIT
0
1
X
OPERATION
0
0
0
INTERNAL OSCILLATOR DIVIDED BY 4*N
INTERNAL OSCILLATOR DIVIDED BY 2*N
INTERNAL OSCILLATOR DIVIDED BY N
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