參數資料
型號: DS1075Z-80IND
英文描述: Oscillator/Divider
中文描述: 振蕩器/除法
文件頁數: 5/12頁
文件大?。?/td> 183K
代理商: DS1075Z-80IND
DS1073
5 of 12
Figure 2
Disable Timing
If OE goes low while OUT1 is high, the output will be disabled on the completion of the output pulse. If
OUT1 is low, the disabling behavior will be dependent on the setup time between the falling edge of OE
and the rising edge of MCLK. If t
SU
< T
SUEM
the result will be one additional pulse appearing on the
output before disabling occurs.
If the device is in divide-by-one mode, the disabling occurs slightly differently. In this case if t
SU
> T
SUEM
one additional output pulse will appear, if t
SU
<
T
SUEM
then two additional output pulses will appear. The
following diagrams illustrate the timing in each of these cases. (Figure 3 and 4)
Figure 3
Figure 4
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相關代理商/技術參數
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