參數(shù)資料
型號(hào): DS1085Z-50+
廠(chǎng)商: Maxim Integrated Products
文件頁(yè)數(shù): 17/21頁(yè)
文件大?。?/td> 0K
描述: IC ECONOSCILLATOR SYNTH 8-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 100
系列: EconOscillator™
類(lèi)型: 頻率合成器
PLL: 無(wú)
輸入: 時(shí)鐘
輸出: 時(shí)鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無(wú)/無(wú)
頻率 - 最大: 133MHz
除法器/乘法器: 是/無(wú)
電源電壓: 4.75 V ~ 5.25 V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
DS1085
5 of 21
REGISTER FUNCTIONS
The user-programmable registers can be used to determine the mode of operation (MUX), operating
frequency (DAC, OFFSET, DIV), and bus settings (ADDR). The functions of the registers are described
in this section, but details of how these registers are programmed can be found in a later section. The
register settings are nonvolatile, with the values being stored automatically or as required in EEPROM
when the registers are programmed through the SDA and SCL pins.
DAC WORD (Address 08h)
MSB
LSB
MSB
LSB
d9
d8
d7
d6
d5
d4
d3
d2
d1
d0
X
First Data Byte
Second Data Byte
X = Don’t care.
The DAC word (d0–d9) controls the frequency of the master oscillator. The resolution of this register
depends on the step size of the device. The absolute frequency of the device also depends on the value of
the OFFSET register (see Table 5 and 6).
Table 5. DEFAULT DAC SETTINGS
DS1085Z-10
DS1085Z-25
DS1085Z-50
Frequency
DAC
Offset
Frequency
DAC
Offset
Frequency
DAC
Offset
97.1MHz
500
OS
104.6MHz
600
OS
101.8MHz
500
OS
For any given value of OFFSET the master oscillator frequency can be derived as follows:
Frequency = Min Frequency + DAC x Step Size
where: Min frequency is the lowest frequency shown in Table 6 for the corresponding offset.
DAC is the value of the DAC register (0–1023).
Step size is the step size of the device (10kHz, 25kHz, or 50kHz).
OS is the decimal, integer value of the five MSBs of the RANGE register.
OFFSET BYTE
(Address 0Eh)
MSB
LSB
X
O4
O3
O2
O1
O0
X = Don’t care.
The OFFSET byte (O0–O4) determines the range of frequencies that can be obtained within the absolute
minimum and maximum range of the oscillator. Correct operation of the device is not guaranteed for
values of OFFSET not shown in Table 6.
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